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Commit Graph

11129 Commits

Author SHA1 Message Date
Chris Lattner
27adcf1b0f fix some pastos
llvm-svn: 23635
2005-10-05 06:37:22 +00:00
Chris Lattner
697fdaba58 Add a new HandleNode class, which is used to handle (haha) cases in the
dead node elim and dag combiner passes where the root is potentially updated.
This fixes a fixme in the dag combiner.

llvm-svn: 23634
2005-10-05 06:35:28 +00:00
Chris Lattner
75ce53eefd Implement the code for PowerPC/inverted-bool-compares.ll, even though it
that testcase still does not pass with the dag combiner.  This is because
not all forms of br* are folded yet.

Also, when we combine a node into another one, delete the node immediately
instead of waiting for the node to potentially come up in the future.

llvm-svn: 23632
2005-10-05 06:11:08 +00:00
Chris Lattner
cf12d7b556 make sure that -view-isel-dags is the input to the isel, not the input to
the second phase of dag combining

llvm-svn: 23631
2005-10-05 06:09:10 +00:00
Chris Lattner
86ccb0efb4 Fix a crash compiling Olden/tsp
llvm-svn: 23630
2005-10-05 04:45:43 +00:00
Chris Lattner
b98aa6cc83 refactor a bit of code.
When moving constant entries in 'Map' if the entry is the representative
constant for the abstractypemap, make sure to update it as well.  This
fixes the bcreader failures from last night on several C++ apps.

llvm-svn: 23628
2005-10-04 21:35:50 +00:00
Chris Lattner
0fcb065305 Minor speedup to avoid array searches given a Use*. This speeds up bc reading
of the python test from 1:00 to 54s.

llvm-svn: 23627
2005-10-04 18:47:09 +00:00
Chris Lattner
e2a54ddd33 Change the signature of replaceUsesOfWithOnConstant. The bool was always
true dynamically.  Finally, pass the Use* that replaceAllUsesWith has into
the method for future use.

llvm-svn: 23626
2005-10-04 18:13:04 +00:00
Chris Lattner
8cce7373f7 For large constants (e.g. arrays and structs with many elements) just
creating the keys and doing comparisons to index into 'Map' takes a lot
of time.  For these large constants, keep an inverse map so that 'remove'
and move operations are much faster.

This speeds up a release build of the bc reader on Eric's nasty python
bytecode file from 1:39 to 1:00s.

llvm-svn: 23624
2005-10-04 17:48:46 +00:00
Chris Lattner
6627e8e4b5 minor cleanup/fastpath for the bcreader. This speeds up the bcreader
from 1:41 -> 1:39 on the large python .bc file in a release build.

llvm-svn: 23623
2005-10-04 16:52:46 +00:00
Jim Laskey
9a2a3d4aab Reverting to version - until problem isolated.
llvm-svn: 23622
2005-10-04 16:41:51 +00:00
Chris Lattner
70ebb767b4 Add a forward def
llvm-svn: 23621
2005-10-04 05:09:20 +00:00
Nate Begeman
9740be11f7 Fix some faulty logic in the libcall inserter.
Since calls return more than one value, don't bail if one of their uses
happens to be a node that's not an MVT::Other when following the chain
from CALLSEQ_START to CALLSEQ_END.

Once we've found a CALLSEQ_START, we can just return; there's no need to
tail-recurse further up the graph.

Most importantly, just because something only has one use doesn't mean we
should use it's one use to follow from start to end.  This faulty logic
caused us to follow a chain of one-use FP operations back to a much earlier
call, putting a cycle in the graph from a later start to an earlier end.

This is a better fix that reverting to the workaround committed earlier
today.

llvm-svn: 23620
2005-10-04 02:10:55 +00:00
Chris Lattner
5d68585bb1 implement the struct version of the array speedup, speeding up the
testcase a bit more from 1:48 -> 1.40.

llvm-svn: 23619
2005-10-04 01:17:50 +00:00
Chris Lattner
27464c8061 Fix DemoteRegToStack on an invoke. This fixes PR634.
llvm-svn: 23618
2005-10-04 00:44:01 +00:00
Nate Begeman
2dcd06e46c Add back a workaround that fixes some breakages from chris's last change.
Neither of us have yet figured out why this code is necessary, but stuff
breaks if its not there.  Still tracking this down...

llvm-svn: 23617
2005-10-04 00:37:37 +00:00
Chris Lattner
cd43592209 Clean up the code a bit. Use isInstructionTriviallyDead to be more aggressive
and more correct than use_empty().  This fixes PR635 and
SimplifyCFG/2005-10-02-InvokeSimplify.ll

llvm-svn: 23616
2005-10-03 23:43:43 +00:00
Chris Lattner
eb44192fe0 Change ConstantArray::replaceUsesOfWithOnConstant to attempt to update
constant arrays in place instead of reallocating them and replaceAllUsesOf'ing
the result.  This speeds up a release build of the bcreader from:

136.987u 120.866s 4:24.38
to
49.790u 49.890s 1:40.14

... a 2.6x speedup parsing a large python bc file.

llvm-svn: 23614
2005-10-03 22:51:37 +00:00
Chris Lattner
ae1bdaf67e move some methods, no other changes
llvm-svn: 23613
2005-10-03 21:58:36 +00:00
Chris Lattner
6a65c397f3 minor microoptimizations
llvm-svn: 23612
2005-10-03 21:56:24 +00:00
Chris Lattner
14db91a643 Use a map to cache the ModuleType information, so we can do logarithmic
lookups instead of linear time lookups.  This speeds up bc parsing of a
large file from

137.834u 118.256s 4:27.96
to
132.611u 114.436s 4:08.53

with a release build.

llvm-svn: 23611
2005-10-03 21:26:53 +00:00
Jim Laskey
22633f7a41 Refactor gathering node info and emission.
llvm-svn: 23610
2005-10-03 12:30:32 +00:00
Chris Lattner
7754dd8231 clean up this code a bit, no functionality change
llvm-svn: 23609
2005-10-03 07:22:07 +00:00
Chris Lattner
26a791ec89 Speed up the asm printer a lot by not printing formatted LLVM asm output
for globals

llvm-svn: 23608
2005-10-03 07:08:36 +00:00
Chris Lattner
018dc6d807 Break the body of the loop out into a new method
llvm-svn: 23606
2005-10-03 04:47:08 +00:00
Chris Lattner
be6f88a2e8 Make IVUseShouldUsePostIncValue more aggressive when the use is a PHI. In
particular, it should realize that phi's use their values in the pred block
not the phi block itself.  This change turns our em3d loop from this:

_test:
        cmpwi cr0, r4, 0
        bgt cr0, LBB_test_2     ; entry.no_exit_crit_edge
LBB_test_1:     ; entry.loopexit_crit_edge
        li r2, 0
        b LBB_test_6    ; loopexit
LBB_test_2:     ; entry.no_exit_crit_edge
        li r6, 0
LBB_test_3:     ; no_exit
        or r2, r6, r6
        lwz r6, 0(r3)
        cmpw cr0, r6, r5
        beq cr0, LBB_test_6     ; loopexit
LBB_test_4:     ; endif
        addi r3, r3, 4
        addi r6, r2, 1
        cmpw cr0, r6, r4
        blt cr0, LBB_test_3     ; no_exit
LBB_test_5:     ; endif.loopexit.loopexit_crit_edge
        addi r3, r2, 1
        blr
LBB_test_6:     ; loopexit
        or r3, r2, r2
        blr

into:

_test:
        cmpwi cr0, r4, 0
        bgt cr0, LBB_test_2     ; entry.no_exit_crit_edge
LBB_test_1:     ; entry.loopexit_crit_edge
        li r2, 0
        b LBB_test_5    ; loopexit
LBB_test_2:     ; entry.no_exit_crit_edge
        li r6, 0
LBB_test_3:     ; no_exit
        lwz r2, 0(r3)
        cmpw cr0, r2, r5
        or r2, r6, r6
        beq cr0, LBB_test_5     ; loopexit
LBB_test_4:     ; endif
        addi r3, r3, 4
        addi r6, r6, 1
        cmpw cr0, r6, r4
        or r2, r6, r6
        blt cr0, LBB_test_3     ; no_exit
LBB_test_5:     ; loopexit
        or r3, r2, r2
        blr


Unfortunately, this is actually worse code, because the register coallescer
is getting confused somehow.  If it were doing its job right, it could turn the
code into this:

_test:
        cmpwi cr0, r4, 0
        bgt cr0, LBB_test_2     ; entry.no_exit_crit_edge
LBB_test_1:     ; entry.loopexit_crit_edge
        li r6, 0
        b LBB_test_5    ; loopexit
LBB_test_2:     ; entry.no_exit_crit_edge
        li r6, 0
LBB_test_3:     ; no_exit
        lwz r2, 0(r3)
        cmpw cr0, r2, r5
        beq cr0, LBB_test_5     ; loopexit
LBB_test_4:     ; endif
        addi r3, r3, 4
        addi r6, r6, 1
        cmpw cr0, r6, r4
        blt cr0, LBB_test_3     ; no_exit
LBB_test_5:     ; loopexit
        or r3, r6, r6
        blr

... which I'll work on next. :)

llvm-svn: 23604
2005-10-03 02:50:05 +00:00
Chris Lattner
6a5ace34da Refactor some code into a function
llvm-svn: 23603
2005-10-03 01:04:44 +00:00
Chris Lattner
5a865c8598 This break is bogus and I have no idea why it was there. Basically it prevents
memoizing code when IV's are used by phinodes outside of loops.  In a simple
example, we were getting this code before (note that r6 and r7 are isomorphic
IV's):

        li r6, 0
        or r7, r6, r6
LBB_test_3:     ; no_exit
        lwz r2, 0(r3)
        cmpw cr0, r2, r5
        or r2, r7, r7
        beq cr0, LBB_test_5     ; loopexit
LBB_test_4:     ; endif
        addi r2, r7, 1
        addi r7, r7, 1
        addi r3, r3, 4
        addi r6, r6, 1
        cmpw cr0, r6, r4
        blt cr0, LBB_test_3     ; no_exit

Now we get:

        li r6, 0
LBB_test_3:     ; no_exit
        or r2, r6, r6
        lwz r6, 0(r3)
        cmpw cr0, r6, r5
        beq cr0, LBB_test_6     ; loopexit
LBB_test_4:     ; endif
        addi r3, r3, 4
        addi r6, r2, 1
        cmpw cr0, r6, r4
        blt cr0, LBB_test_3     ; no_exit

this was noticed in em3d.

llvm-svn: 23602
2005-10-03 00:37:33 +00:00
Chris Lattner
af938ddbe5 when checking if we should move a split edge block outside of a loop,
check the presplit pred, not the post-split pred.  This was causing us
to make the wrong decision in some cases, leaving the critical edge block
in the loop.

llvm-svn: 23601
2005-10-03 00:31:52 +00:00
Chris Lattner
70b5f4e3fd Fix a problem where the legalizer would run out of stack space on extremely
large basic blocks because it was purely recursive.  This switches it to an
iterative/recursive hybrid.

llvm-svn: 23596
2005-10-02 17:49:46 +00:00
Chris Lattner
52952a665d silence a bogus warning
llvm-svn: 23595
2005-10-02 16:30:51 +00:00
Chris Lattner
462fe8b2cc silence some warnings
llvm-svn: 23594
2005-10-02 16:29:36 +00:00
Chris Lattner
51aeb8156a silence a warning
llvm-svn: 23593
2005-10-02 16:27:59 +00:00
Chris Lattner
d4313f30ea add patterns for float binops and fma ops
llvm-svn: 23592
2005-10-02 07:46:28 +00:00
Chris Lattner
efd92cf886 Sort the cpu and features table, so that the alpha backend doesn't fail EVERY
compile with an assertion that the tables are not sorted!

llvm-svn: 23591
2005-10-02 07:13:52 +00:00
Chris Lattner
aa1a841fc7 Add assertions to the trivial scheduler to check that the value types match
up between defs and uses.

llvm-svn: 23590
2005-10-02 07:10:55 +00:00
Chris Lattner
00a39b4fd5 another solution to the fsel issue. Instead of having 4 variants, just force
the comparison to be 64-bits.  This is fine because extensions from float
to double are free.

llvm-svn: 23589
2005-10-02 07:07:49 +00:00
Chris Lattner
efc0d24037 fsel can take a different FP type for the comparison and for the result. As such
split the FSEL family into 4 things instead of just two.

llvm-svn: 23588
2005-10-02 06:58:23 +00:00
Chris Lattner
f1c1042780 fix an f32/f64 type mismatch
llvm-svn: 23587
2005-10-02 06:37:13 +00:00
Chris Lattner
2b189d4f9e Codegen CopyFromReg using the regclass that matches the valuetype of the
destination vreg.

llvm-svn: 23586
2005-10-02 06:34:16 +00:00
Chris Lattner
89c435541a Adjust to change in ctor
llvm-svn: 23585
2005-10-02 06:23:51 +00:00
Chris Lattner
b66cf00015 Minor tweak to the branch selector. When emitting a two-way branch, and if
we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch.  For example, emit this:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        ble cr0, LBBl29_z__44
        b LBBl29_z__48                   *** NOT PART OF LOOP

Instead of:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        bgt cr0, LBBl29_z__48            *** PART OF LOOP!
        b LBBl29_z__44

The former sequence has one fewer dispatch group for the loop body.

llvm-svn: 23582
2005-10-01 23:06:26 +00:00
Chris Lattner
f26486ee16 like the comment says, enable this
llvm-svn: 23581
2005-10-01 23:02:40 +00:00
Chris Lattner
37fdc6dbf9 Add some very paranoid checking for operand/result reg class matchup
For instructions that define multiple results, use the right regclass
to define the result, not always the rc of result #0

llvm-svn: 23580
2005-10-01 07:45:09 +00:00
Jeff Cohen
412582bcec Fix VC++ warnings.
llvm-svn: 23579
2005-10-01 03:57:14 +00:00
Chris Lattner
2f63a0f7c6 fix typo
llvm-svn: 23578
2005-10-01 02:51:36 +00:00
Chris Lattner
50411b1026 Modify the ppc backend to use two register classes for FP: F8RC and F4RC.
These are used to represent float and double values, and the two regclasses
contain the same physical registers.

llvm-svn: 23577
2005-10-01 01:35:02 +00:00
Chris Lattner
2a439615b7 add a method
llvm-svn: 23575
2005-10-01 00:17:07 +00:00
Jim Laskey
532fc48d3d typo
llvm-svn: 23574
2005-10-01 00:08:23 +00:00
Jim Laskey
809ab88d91 1. Simplify the gathering of node groups.
2. Printing node groups when displaying nodes.

llvm-svn: 23573
2005-10-01 00:03:07 +00:00