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Commit Graph

6 Commits

Author SHA1 Message Date
Justin Lebar
fb2adf7b44 Minor comment fix ("generate" --> "generates").
llvm-svn: 278578
2016-08-12 23:58:19 +00:00
Eugene Zelenko
7be0c1b910 Fix some Clang-tidy modernize and Include What You Use warnings.
Differential revision: https://reviews.llvm.org/D23291

llvm-svn: 278364
2016-08-11 17:20:18 +00:00
Benjamin Kramer
a733725b3a Move helpers into anonymous namespaces. NFC.
llvm-svn: 277916
2016-08-06 11:13:10 +00:00
Krzysztof Parzyszek
09fa692bab Replace MachineInstr* with MachineInstr& in TargetInstrInfo, NFC
There were a few cases introduced with the modulo scheduler.

llvm-svn: 277358
2016-08-01 17:55:48 +00:00
Simon Pilgrim
344cd3659f Fixed (incorrectly firing) MSVC unused variable warning
llvm-svn: 277198
2016-07-29 18:57:32 +00:00
Brendon Cahoon
e37295579e MachinePipeliner pass that implements Swing Modulo Scheduling
Software pipelining is an optimization for improving ILP by
overlapping loop iterations. Swing Modulo Scheduling (SMS) is
an implementation of software pipelining that attempts to
reduce register pressure and generate efficient pipelines with
a low compile-time cost.

This implementaion of SMS is a target-independent back-end pass.
When enabled, the pass should run just prior to the register
allocation pass, while the machine IR is in SSA form. If the pass
is successful, then the original loop is replaced by the optimized
loop. The optimized loop contains one or more prolog blocks, the
pipelined kernel, and one or more epilog blocks.

This pass is enabled for Hexagon only. To enable for other targets,
a couple of target specific hooks must be implemented, and the
pass needs to be called from the target's TargetMachine
implementation.

Differential Review: http://reviews.llvm.org/D16829

llvm-svn: 277169
2016-07-29 16:44:44 +00:00