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10784 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
b3b1db4e67 Include MachineBasicBlock numbers in viewCFG() output. 
llvm-svn: 117765
 2010-10-30 01:26:19 +00:00
Jakob Stoklund Olesen
035667c0d6 Make sure copies are inserted after any exception handling labels at the top of 
a basic block.

llvm-svn: 117764
 2010-10-30 01:26:16 +00:00
Jakob Stoklund Olesen
0ab92619d0 Add SkipPHIsAndLabels from PHIElimination to MachineBasicBlock. It is needed 
elsewhere.

llvm-svn: 117763
 2010-10-30 01:26:14 +00:00
Jakob Stoklund Olesen
b751dffc9f Disable more of physical register live intervals verification. 
llvm-svn: 117762
 2010-10-30 01:26:11 +00:00
Jakob Stoklund Olesen
4425035bfd Print out register class of spilled register. 
llvm-svn: 117761
 2010-10-30 01:26:09 +00:00
Evan Cheng
d81c33d91e Teach machine cse to eliminate instructions with multiple physreg uses and defs. rdar://8610857. 
llvm-svn: 117745
 2010-10-29 23:36:03 +00:00
Bob Wilson
d67dddb134 Remove DAG combiner patch to fold vector splats. Instcombiner does it now. 
llvm-svn: 117720
 2010-10-29 22:03:02 +00:00
Jakob Stoklund Olesen
469a9ef414 Fix sign error. 
llvm-svn: 117677
 2010-10-29 18:21:18 +00:00
Evan Cheng
392d2cbdcc Avoiding overly aggressive latency scheduling. If the two nodes share an 
operand and one of them has a single use that is a live out copy, favor the
one that is live out. Otherwise it will be difficult to eliminate the copy
if the instruction is a loop induction variable update. e.g.

BB:
sub r1, r3, #1
str r0, [r2, r3]
mov r3, r1
cmp
bne BB

=>

BB:
str r0, [r2, r3]
sub r3, r3, #1
cmp
bne BB

This fixed the recent 256.bzip2 regression.

llvm-svn: 117675
 2010-10-29 18:09:28 +00:00
Jakob Stoklund Olesen
1f2fb9a020 Don't transfer unused values to the new intervals formed by splitting. 
llvm-svn: 117673
 2010-10-29 17:47:49 +00:00
Benjamin Kramer
d84e7a7b91 Silence Release build warnings. 
llvm-svn: 117671
 2010-10-29 17:40:05 +00:00
Jakob Stoklund Olesen
d56c4457a6 Teach ConnectedVNInfoEqClasses::Classify to deal with unused values. 
We don't want unused values forming their own equivalence classes, so we lump
them all together in one class, and then merge them with the class of the last
used value.

llvm-svn: 117670
 2010-10-29 17:37:29 +00:00
Jakob Stoklund Olesen
e577489ba5 Never propagate the idom value out of a block that defines its own value. 
llvm-svn: 117669
 2010-10-29 17:37:25 +00:00
John Thompson
6115a7f1d4 Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support. 
llvm-svn: 117667
 2010-10-29 17:29:13 +00:00
Bill Wendling
d9412db2c8 This may be an ARM target, so check for _Unwind_SjLj_Resume. 
llvm-svn: 117643
 2010-10-29 07:46:01 +00:00
Jakob Stoklund Olesen
b7a4b7a7b0 Fix broken equivalence class calculation. We could probably also use 
EquvivalenceClasses.h except it looks like overkill when elements are continuous
integers.

llvm-svn: 117631
 2010-10-29 00:40:59 +00:00
Jakob Stoklund Olesen
1210a5145a Print out the connected components in the verifier after complaining about their 
multiplicity.

llvm-svn: 117630
 2010-10-29 00:40:57 +00:00
Jakob Stoklund Olesen
e446520687 Run a verification pass before any splitting to better distribute blame. 
llvm-svn: 117629
 2010-10-29 00:40:55 +00:00
Devang Patel
bf9c3c8947 Ignore empty blocks. 
llvm-svn: 117615
 2010-10-28 22:11:59 +00:00
Jakob Stoklund Olesen
c570151dc2 One day, physical register live ranges will be sensible. 
llvm-svn: 117602
 2010-10-28 20:44:22 +00:00
Jakob Stoklund Olesen
ccbfbefd93 Replace SplitKit SSA update with an iterative algorithm very similar to the one 
in SSAUpdaterImpl.h

Verifying live intervals revealed that the old method was completely wrong, and
we need an iterative approach to calculating PHI placemant. Fortunately, we have
MachineDominators available, so we don't have to compute that over and over
like SSAUpdaterImpl.h must.

Live-out values are cached between calls to mapValue() and computed in a greedy
way, so most calls will be working with very small block sets.

Thanks to Bob for explaining how this should work.

llvm-svn: 117599
 2010-10-28 20:34:52 +00:00
Jakob Stoklund Olesen
6f4262448e Make MachineDominators available for SplitEditor. We are going to need it for 
proper SSA updating.

This doesn't cause MachineDominators to be recomputed since we are already
requiring MachineLoopInfo which uses dominators as well.

llvm-svn: 117598
 2010-10-28 20:34:50 +00:00
Jakob Stoklund Olesen
35f9c58245 Add a temporary command line option to verify machine code after each spill or 
split.

llvm-svn: 117597
 2010-10-28 20:34:47 +00:00
Devang Patel
a496603faf Do not work too hard to find type's file info. There is a special field to record file info. 
llvm-svn: 117588
 2010-10-28 19:50:08 +00:00
Devang Patel
0e43a2d84f Technically DIFile scope should also be handled here. 
llvm-svn: 117563
 2010-10-28 17:30:52 +00:00
Bob Wilson
65124cd7c7 Teach the DAG combiner to fold a splat of a splat. Radar 8597790. 
Also do some minor refactoring to reduce indentation.

llvm-svn: 117558
 2010-10-28 17:06:14 +00:00
Evan Cheng
bc4588c439 Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. 
llvm-svn: 117531
 2010-10-28 06:47:08 +00:00
Evan Cheng
fdc80a0316 Revert 117518 and 117519 for now. They changed scheduling and cause MC tests to fail. Ugh. 
llvm-svn: 117520
 2010-10-28 02:00:25 +00:00
Evan Cheng
a07cd58978 Fix a major bug in operand latency computation. The use index must be adjusted 
by the number of defs first for it to match the instruction itinerary.

llvm-svn: 117518
 2010-10-28 01:46:29 +00:00
Evan Cheng
77693156fb Putting r117193 back except for the compile time cost. Rather than assuming fallthroughs uses all registers, just gather the union of all successor liveins. 
llvm-svn: 117506
 2010-10-27 23:17:17 +00:00
Michael J. Spencer
bf82646290 COFF: Add IMAGE_SCN_MEM_READ to text sections. 
There are currently 100 references to COFF::IMAGE_SCN in 6 files
and 11 different functions. Section to attribute mapping really
needs to happen in one place to avoid problems like this.

llvm-svn: 117473
 2010-10-27 18:52:29 +00:00
Michael J. Spencer
fc69783598 Fix whitespace. 
llvm-svn: 117472
 2010-10-27 18:52:20 +00:00
Jim Grosbach
ddd67f8e88 Formatting. 
llvm-svn: 117453
 2010-10-27 16:30:18 +00:00
Jakob Stoklund Olesen
66180b2c06 Handle critical loop predecessors by making both inside and outside registers 
live out.

This doesn't prevent us from inserting a loop preheader later on, if that is
better.

llvm-svn: 117424
 2010-10-27 00:39:07 +00:00
Jakob Stoklund Olesen
514eb703b8 Compute critical loop predecessors in the same way as critical loop exits. 
Critical edges going into a loop are not as bad as critical exits. We can handle
them by splitting the critical edge, or by having both inside and outside
registers live out of the predecessor.

llvm-svn: 117423
 2010-10-27 00:39:05 +00:00
Jakob Stoklund Olesen
4701c56446 Physical registers trivially have multiple connected components all the time. 
Only virtuals should be requires to be connected.

llvm-svn: 117422
 2010-10-27 00:39:01 +00:00
Dale Johannesen
e7f07349e4 Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches 
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.

llvm-svn: 117413
 2010-10-26 23:11:10 +00:00
Andrew Trick
6363e80ded Remove the vector of live vregs. I thought we would need to track 
them, but hopefully we won't. And this is not the right data structure
to do it anyway.

llvm-svn: 117412
 2010-10-26 22:58:24 +00:00
Jakob Stoklund Olesen
bb4b26c42b After splitting, compute connected components of all new registers, not just for 
the remainder register.

Example:

bb0:
  x = 1
bb1:
  use(x)
  ...
  x = 2
  jump bb1

When x is isolated in bb1, the inner part breaks into two components, x1 and x2:

bb0:
  x0 = 1
bb1:
  x1 = x0
  use(x1)
  ...
  x2 = 2
  x0 = x2
  jump bb1

llvm-svn: 117408
 2010-10-26 22:36:09 +00:00
Jakob Stoklund Olesen
3bf3211458 Verify that live intervals are connected. If there are multiple connected 
components, each should get its own virtual register.

llvm-svn: 117407
 2010-10-26 22:36:07 +00:00
Jakob Stoklund Olesen
fa777d622d Call RenumberValues for all new registers created during splitting. This is 
necessary to get correct hasPHIKill flags.

llvm-svn: 117406
 2010-10-26 22:36:05 +00:00
Jakob Stoklund Olesen
0007e9a345 Preserve PHIDef bits in cloned values during splitting. 
llvm-svn: 117405
 2010-10-26 22:36:02 +00:00
Devang Patel
7796146304 Assign source ordering to nodes created for StoreInst. 
llvm-svn: 117404
 2010-10-26 22:14:52 +00:00
Jakob Stoklund Olesen
3a4c0c13eb Teach MachineBasicBlock::print() to annotate instructions and blocks with 
SlotIndexes when available.

llvm-svn: 117392
 2010-10-26 20:21:46 +00:00
Jakob Stoklund Olesen
195132633a Remmeber to print full live interval on verification error. 
llvm-svn: 117391
 2010-10-26 20:21:43 +00:00
Andrew Trick
06fb7ed472 Jakob's review of the basic register allocator. 
llvm-svn: 117384
 2010-10-26 18:34:01 +00:00
Devang Patel
e544bb3842 s/beginScope/beginInstruction/g 
s/endScope/endInstruction/g

llvm-svn: 117376
 2010-10-26 17:49:02 +00:00
Jakob Stoklund Olesen
de018e2d8e Don't verify physical registers going into landing pads. 
Magic is happening that we don't understand.

llvm-svn: 117370
 2010-10-26 16:49:23 +00:00
Evan Cheng
324e678bb7 Use instruction itinerary to determine what instructions are 'cheap'. 
llvm-svn: 117348
 2010-10-26 02:08:50 +00:00
Nick Lewycky
f7dddd658f For statistics that are only used in functions declared in !NDEBUG, wrap the 
declarations in !NDEBUG to avoid -Wunused-variable warnings. Patch by
Matt Beaumont-Gay!

llvm-svn: 117345
 2010-10-26 00:51:57 +00:00