Chris Lattner
2edbad8a3d
convert targets to the new MF.getMachineMemOperand interface.
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llvm-svn: 114391
2010-09-21 04:39:43 +00:00
Jakob Stoklund Olesen
44949b2e1b
Remove the isMoveInstr() hook.
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llvm-svn: 108567
2010-07-16 22:35:46 +00:00
Bill Wendling
e2833a21c2
Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
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thus is a much more meaningful name.
llvm-svn: 108563
2010-07-16 22:20:36 +00:00
Jakob Stoklund Olesen
fb3525531b
Replace copyRegToReg with copyPhysReg for MSP430.
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llvm-svn: 108080
2010-07-11 06:53:30 +00:00
Stuart Hastings
bd7194d21c
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
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addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
llvm-svn: 106243
2010-06-17 22:43:56 +00:00
Evan Cheng
241d2c434e
Implement @llvm.returnaddress. rdar://8015977.
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llvm-svn: 104421
2010-05-22 01:47:14 +00:00
Dan Gohman
497e752655
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
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doesn't have to guess.
llvm-svn: 103194
2010-05-06 20:33:48 +00:00
Evan Cheng
80f3051bb7
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
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llvm-svn: 103193
2010-05-06 19:06:44 +00:00
Anton Korobeynikov
9b724bd446
Implement indirect branches on MSP430
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llvm-svn: 102835
2010-05-01 12:04:32 +00:00
Dale Johannesen
8691bcbc2a
Educate GetInstrSizeInBytes implementations that
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DBG_VALUE does not generate code.
llvm-svn: 100681
2010-04-07 19:51:44 +00:00
Chris Lattner
58b7cca257
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
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llvm-svn: 100214
2010-04-02 20:16:16 +00:00
Dale Johannesen
5b35f2ee86
Teach AnalyzeBranch, RemoveBranch and the branch
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folder to be tolerant of debug info following the
branch(es) at the end of a block.
llvm-svn: 100168
2010-04-02 01:38:09 +00:00
Chris Lattner
7acf9be6c4
move target-independent opcodes out of TargetInstrInfo
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into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
llvm-svn: 95687
2010-02-09 19:54:29 +00:00
Anton Korobeynikov
f1080f2bbe
Add branch relaxation pass (shamelessly stolen from PPC).
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llvm-svn: 93554
2010-01-15 21:19:05 +00:00
Dan Gohman
f9654e9258
Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
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MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.
llvm-svn: 90634
2009-12-05 00:44:40 +00:00
Chris Lattner
9ce833945e
improve portability to avoid conflicting with std::next in c++'0x.
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Patch by Howard Hinnant!
llvm-svn: 90365
2009-12-03 00:50:42 +00:00
Anton Korobeynikov
c377bd8b38
Add few pseudo-source-values
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llvm-svn: 86383
2009-11-07 17:13:57 +00:00
Anton Korobeynikov
d233af8049
RMW preprocessing stuff was incorrect. Grab the stuff from x86 backend and disable some tests until it will be clever enough to handle them.
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llvm-svn: 84775
2009-10-21 19:17:55 +00:00
Anton Korobeynikov
6329ddd231
Implement branch folding
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llvm-svn: 84774
2009-10-21 19:17:18 +00:00
Torok Edwin
f955a6ef49
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
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This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
llvm-svn: 75640
2009-07-14 16:55:14 +00:00
Torok Edwin
ae8a3ff177
assert(0) -> LLVM_UNREACHABLE.
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Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
llvm-svn: 75379
2009-07-11 20:10:48 +00:00
Bill Wendling
e421c8f63d
Change MachineInstrBuilder::addReg() to take a flag instead of a list of
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booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.
I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).
llvm-svn: 71722
2009-05-13 21:33:08 +00:00
Anton Korobeynikov
806b8efb5e
Add InsertBranch() hook for tail mergeing
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llvm-svn: 70754
2009-05-03 13:15:22 +00:00
Anton Korobeynikov
10d199fa80
Add code for save/restore of callee-saved registers
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llvm-svn: 70739
2009-05-03 13:11:04 +00:00
Anton Korobeynikov
e7639579a3
First draft of stack slot loads / stores lowering
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llvm-svn: 70735
2009-05-03 13:09:57 +00:00
Anton Korobeynikov
b396742d02
Add call frame setup instruction elimination and lowerid for bunch of call-related stuff.
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llvm-svn: 70728
2009-05-03 13:07:54 +00:00
Anton Korobeynikov
83122b7ef0
Add 8-bit insts. zext behaviour is not modelled yet
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llvm-svn: 70722
2009-05-03 13:05:42 +00:00
Anton Korobeynikov
e9e0353b21
Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly!
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llvm-svn: 70710
2009-05-03 13:02:04 +00:00
Anton Korobeynikov
d49e584da5
Dummy MSP430 backend
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llvm-svn: 70694
2009-05-03 12:57:15 +00:00