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11238 Commits

Author SHA1 Message Date
Dan Gohman
2bce18dae9 Use GR32 for copies between GR32_NOSP and GR32_NOREX, as neither 
is a subset of the other, but both are subsets of GR32.

llvm-svn: 78250
 2009-08-05 22:18:26 +00:00
David Goodwin
6e4065d7c6 When using NEON for single-precision FP, the NEON result must be placed in D0-D15 as these are the only D registers with S subregs. Introduce a new regclass to represent D0-D15 and use it in the NEON single-precision FP patterns. 
llvm-svn: 78244
 2009-08-05 21:02:22 +00:00
Chris Lattner
8a74485e06 remove the 'DataSectionStartSuffix' and 'TextSectionStartSuffix' knobs. 
llvm-svn: 78242
 2009-08-05 20:49:52 +00:00
Anton Korobeynikov
7a0835dec5 Remove redundand checks: the only way to have, e.g. f32 RegVT is exactly 
hardfloat case.

llvm-svn: 78237
 2009-08-05 20:15:19 +00:00
Dan Gohman
892fcb1d57 hasSuperClass tests for a strict superset relation, rather than 
a superset relation. This code wants to test the regular superset
relation.

llvm-svn: 78236
 2009-08-05 20:13:45 +00:00
Anton Korobeynikov
7f9b6ff4a3 Unbreak the stuff, this is ugly, but we cannot do better for now with 'plain' C calling conv. 
llvm-svn: 78232
 2009-08-05 19:40:16 +00:00
Anton Korobeynikov
07ce0611d9 Missed pieces for ARM HardFP ABI. 
Patch by Sandeep Patel!

llvm-svn: 78225
 2009-08-05 19:04:42 +00:00
Andrew Lenharth
fe85ecc26b Use elf Object File directly 
llvm-svn: 78220
 2009-08-05 18:13:04 +00:00
Daniel Dunbar
3d2ac751da Remove some dead code. 
llvm-svn: 78219
 2009-08-05 18:12:37 +00:00
Dan Gohman
ac47a4b9ed Enable the new no-SP register classes by default. This is to address 
PR4572. A few tests have some minor code regressions due to different
coalescing.

llvm-svn: 78217
 2009-08-05 17:40:24 +00:00
Bob Wilson
c0e1bed13f Remove a redundant declaration. 
llvm-svn: 78216
 2009-08-05 17:39:44 +00:00
Anton Korobeynikov
81300620cf Convert bswap test to filecheck, add more test entries & convert stuff to filecheck 
llvm-svn: 78212
 2009-08-05 16:50:53 +00:00
Dan Gohman
dda3c89020 Fix a bug in the PIC16 backend. 
llvm-svn: 78211
 2009-08-05 16:46:43 +00:00
David Goodwin
9013115518 Disable NEON single-precision FP support for Cortex-A8, for now... 
llvm-svn: 78209
 2009-08-05 16:40:57 +00:00
Devang Patel
fde898c9f1 Remove dead code. MDNode and MDString are not Constant anymore. 
llvm-svn: 78207
 2009-08-05 16:40:02 +00:00
Anton Korobeynikov
c95b5fb0e5 Add memory versions of some instructions. 
Patch by Neale Ferguson!

llvm-svn: 78203
 2009-08-05 16:16:11 +00:00
David Goodwin
47064aa1c6 By default, for cortex-a8 use NEON for single-precision FP. 
llvm-svn: 78200
 2009-08-05 16:01:19 +00:00
Anton Korobeynikov
27fdf43425 Special constants as destinations does not work as expected - drop the patterns. 
llvm-svn: 78191
 2009-08-05 14:42:00 +00:00
Andrew Lenharth
1c03c3e158 Alpha: Get section directives right 
llvm-svn: 78189
 2009-08-05 13:59:57 +00:00
Anton Korobeynikov
021f465fb5 Cleanup in dbg_stoppoint handling in CBE. Patch by Sandeep Patel. 
llvm-svn: 78182
 2009-08-05 09:31:40 +00:00
Anton Korobeynikov
0b9020497c Minor arm CBE fixes. Patch by Sandeep. 
llvm-svn: 78181
 2009-08-05 09:31:07 +00:00
Anton Korobeynikov
f2b8211265 Emit module-level inline asm for CBE. 
Patch by Sandeep Patel

llvm-svn: 78180
 2009-08-05 09:29:56 +00:00
Bruno Cardoso Lopes
2ae97a2777 - Remove custom handling of jumptables by the elf writter (this was 
a dirty hack and isn't need anymore since the last x86 code emitter patch)
- Add a target-dependent modifier to addend calculation
- Use R_X86_64_32S relocation for X86::reloc_absolute_word_sext
- Use getELFSectionFlags whenever possible
- fix getTextSection to use TLOF and emit the right text section 
- Handle global emission for static ctors, dtors and Type::PointerTyID
- Some minor fixes

llvm-svn: 78176
 2009-08-05 06:57:03 +00:00
Evan Cheng
a27fac5075 80 col violations. 
llvm-svn: 78175
 2009-08-05 06:41:25 +00:00
Dan Gohman
1110fb6bbd Teach X86FastISel how to handle CCValAssign::BCvt, which is used for 
MMX arguments. This fixes PR4684.

llvm-svn: 78163
 2009-08-05 05:33:42 +00:00
Chris Lattner
19d238562d Clarify common linkage and the requirements on it. Enforce 
them in the verifier.

llvm-svn: 78160
 2009-08-05 05:21:07 +00:00
Chris Lattner
fd211f171d expose SectionKindForGlobal to curious clients, named as 
getKindForGlobal.

llvm-svn: 78156
 2009-08-05 04:25:40 +00:00
Bob Wilson
15c5c15ccb Oops. I didn't mean to commit this piece yet. 
llvm-svn: 78146
 2009-08-05 02:47:13 +00:00
Dan Gohman
5d566d918b Major calling convention code refactoring. 
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.

llvm-svn: 78142
 2009-08-05 01:29:28 +00:00
Dan Gohman
fd9e5bc299 Remove an unnecessary flush in the CppBackend's output. 
llvm-svn: 78138
 2009-08-05 01:06:38 +00:00
Dan Gohman
4b2748d474 Don't flush the raw_ostream between each MachineFunction. These flush 
calls were originally put in place because errs() at one time was
not unbuffered, and these print routines are commonly used with errs()
for debugging. However, errs() is now properly unbuffered, so the
flush calls are no longer needed. This significantly reduces the
number of write(2) calls for regular asm printing when there are many
small functions.

llvm-svn: 78137
 2009-08-05 00:49:25 +00:00
Bob Wilson
1fe51064ba Change DAG nodes for Neon VLD2/3/4 operations to return multiple results. 
Get rid of yesterday's code to fix the register usage during isel.
Select the new DAG nodes to machine instructions.  The new pre-alloc pass
to choose adjacent registers for these results is not done, so the
results of this will generally not assemble yet.

llvm-svn: 78136
 2009-08-05 00:49:09 +00:00
Bruno Cardoso Lopes
21bb984953 1) Proper emit displacements for x86, using absolute relocations where necessary 
for ELF to work.  
2) RIP addressing: Use SIB bytes for absolute relocations where RegBase=0, 
IndexReg=0.
3) The JIT can get the real address of cstpools and jmptables during
code emission, fix that for object code emission

llvm-svn: 78129
 2009-08-05 00:11:21 +00:00
Evan Cheng
e366789b50 Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode. 
llvm-svn: 78126
 2009-08-04 23:47:55 +00:00
Bob Wilson
3607eeebfa Replace dregsingle operand modifier with explicit escaped curly brackets. 
For other VLDn and VSTn operations, we need to list the multiple registers
explicitly anyway, so there's no point in special-casing this one usage.

llvm-svn: 78109
 2009-08-04 21:39:33 +00:00
Mike Stump
ba093f21d7 Restlyize to match other targets, fixes cmake build to boot. 
llvm-svn: 78105
 2009-08-04 21:27:06 +00:00
Evan Cheng
2ec9ab08d8 Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet. 
llvm-svn: 78104
 2009-08-04 21:12:13 +00:00
Chris Lattner
ab57a6c861 remove a random reference to subtarget. Even without this, we 
still get "intel syntax" instructions from llc with  
-x86-asm-syntax=intel

llvm-svn: 78103
 2009-08-04 21:12:08 +00:00
David Goodwin
648590849c Add NEON single-precision FP support for fabs and fneg. 
llvm-svn: 78101
 2009-08-04 20:39:05 +00:00
Chris Lattner
87372c0978 rip out SectionEndDirectiveSuffix support, only uses by 
the masm backend.  If anyone cares about masm in the future,
we'll have semantic sections it can hang off of.

llvm-svn: 78096
 2009-08-04 20:09:41 +00:00
Jakob Stoklund Olesen
c30af14672 Most flags are reserved registers on Blackfin. 
The only exception is CC.

llvm-svn: 78089
 2009-08-04 19:16:55 +00:00
Evan Cheng
29fe8806d5 In thumb mode, r7 is used as frame register. This fixes pr4681. 
llvm-svn: 78086
 2009-08-04 18:46:17 +00:00
David Goodwin
5efde448fa Match common pattern for FNMAC. Add NEON SP support. 
llvm-svn: 78085
 2009-08-04 18:44:29 +00:00
Sanjiv Gupta
f1726f1105 Legalize i64 store operations generated by inst-combine. 
llvm-svn: 78082
 2009-08-04 17:59:16 +00:00
David Goodwin
99adffe5f2 Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations. 
llvm-svn: 78081
 2009-08-04 17:53:06 +00:00
Daniel Dunbar
d5d4cfa604 Avoid compiler warning (in -Asserts mode) 
llvm-svn: 78070
 2009-08-04 16:46:12 +00:00
Chris Lattner
8f9a2d3c85 enhance codegen to put 16-bit character strings into the 
__TEXT,__ustring section on darwin.

llvm-svn: 78068
 2009-08-04 16:27:13 +00:00
Chris Lattner
ec75250455 fix a fixme: don't create an explicit "CStringSection" for ELF, 
it is just being used as a prefix, so forward substitute it directly.

llvm-svn: 78067
 2009-08-04 16:19:50 +00:00
Chris Lattner
41ade57a63 Add support emiting for 2/4 byte mergable strings to the ".rodata.str*" 
section on ELF targets.

llvm-svn: 78066
 2009-08-04 16:13:09 +00:00
Anton Korobeynikov
10f01c8dd7 Ooops, I was too fast to commit the wrong fix :( 
llvm-svn: 78060
 2009-08-04 11:18:31 +00:00