Hal Finkel
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d591c94df7
|
Make CR spill and restore use a reserved register. These operations cannot use the register scavenger because the scavenger can only scavenge one register and frame-index elimination may have already grabbed it.
llvm-svn: 146318
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2011-12-10 04:50:53 +00:00 |
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Hal Finkel
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a76ada827b
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delaying restore-cr changed assigned registers in some tests
llvm-svn: 145963
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2011-12-06 20:55:46 +00:00 |
|
Hal Finkel
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8b1e460cd9
|
enable PPC register scavenging by default (update tests and remove some FIXMEs)
llvm-svn: 145819
|
2011-12-05 17:55:17 +00:00 |
|
Hal Finkel
|
77cfe064a7
|
add basic PPC register-pressure feedback; adjust the vaarg test to match the new register-allocation pattern
llvm-svn: 145065
|
2011-11-22 16:21:04 +00:00 |
|
Dan Gohman
|
6e1bd851dc
|
Change the default scheduler from Latency to ILP, since Latency
is going away.
llvm-svn: 142810
|
2011-10-24 17:45:02 +00:00 |
|
Roman Divacky
|
736e37d9b9
|
Implement ISD::VAARG lowering on PPC32.
llvm-svn: 134005
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2011-06-28 15:30:42 +00:00 |
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