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Author SHA1 Message Date
Chris Lattner
2d9b28ac0b Improve codegen of long == and != comparisons against constants. Before, 
comparing a long against zero got us this:

        sub %ESP, 8
        mov DWORD PTR [%ESP + 4], %ESI
        mov DWORD PTR [%ESP], %EDI
        mov %EAX, DWORD PTR [%ESP + 12]
        mov %EDX, DWORD PTR [%ESP + 16]
        mov %ECX, 0
        mov %ESI, 0
        mov %EDI, %EAX
        xor %EDI, %ECX
        mov %ECX, %EDX
        xor %ECX, %ESI
        or %EDI, %ECX
        sete %CL
        test %CL, %CL
        je .LBB2 # PC rel: F

Now it gets us this:

        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        mov %ECX, %EAX
        or %ECX, %EDX
        sete %CL
        test %CL, %CL
        je .LBB2 # PC rel: F

llvm-svn: 12696
 2004-04-06 16:02:27 +00:00
Chris Lattner
fd7b570dff Handle various other important cases of multiplying a long constant immediate. For 
example, multiplying X*(1 + (1LL << 32)) now produces:

test:
        mov %ECX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        mov %EAX, %ECX
        add %EDX, %ECX
        ret

[[[Note to Alkis: why isn't linear scan generating this code??  This might be a
 problem with your intervals being too conservative:

test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        add %EDX, %EAX
        ret

end note]]]

Whereas GCC produces this:

T:
        sub     %esp, 12
        mov     %edx, DWORD PTR [%esp+16]
        mov     DWORD PTR [%esp+8], %edi
        mov     %ecx, DWORD PTR [%esp+20]
        xor     %edi, %edi
        mov     DWORD PTR [%esp], %ebx
        mov     %ebx, %edi
        mov     %eax, %edx
        mov     DWORD PTR [%esp+4], %esi
        add     %ebx, %edx
        mov     %edi, DWORD PTR [%esp+8]
        lea     %edx, [%ecx+%ebx]
        mov     %esi, DWORD PTR [%esp+4]
        mov     %ebx, DWORD PTR [%esp]
        add     %esp, 12
        ret

I'm not sure example what GCC is smoking here, but it looks like it has just
confused itself with a bunch of stack slots or something.  The intel compiler
is better, but still not good:

T:
        movl      4(%esp), %edx                                 #2.11
        movl      8(%esp), %eax                                 #2.11
        lea       (%eax,%edx), %ecx                             #3.12
        movl      $1, %eax                                      #3.12
        mull      %edx                                          #3.12
        addl      %ecx, %edx                                    #3.12
        ret                                                     #3.12

llvm-svn: 12693
 2004-04-06 04:55:43 +00:00
Chris Lattner
6038e5a4a1 Efficiently handle a long multiplication by a constant. For this testcase: 
long %test(long %X) {
        %Y = mul long %X, 123
        ret long %Y
}

we used to generate:

test:
        sub %ESP, 12
        mov DWORD PTR [%ESP + 8], %ESI
        mov DWORD PTR [%ESP + 4], %EDI
        mov DWORD PTR [%ESP], %EBX
        mov %ECX, DWORD PTR [%ESP + 16]
        mov %ESI, DWORD PTR [%ESP + 20]
        mov %EDI, 123
        mov %EBX, 0
        mov %EAX, %ECX
        mul %EDI
        imul %ESI, %EDI
        add %ESI, %EDX
        imul %ECX, %EBX
        add %ESI, %ECX
        mov %EDX, %ESI
        mov %EBX, DWORD PTR [%ESP]
        mov %EDI, DWORD PTR [%ESP + 4]
        mov %ESI, DWORD PTR [%ESP + 8]
        add %ESP, 12
        ret

Now we emit:
test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EDX, 123
        mul %EDX
        imul %ECX, %ECX, 123
        add %ECX, %EDX
        mov %EDX, %ECX
        ret

Which, incidently, is substantially nicer than what GCC manages:
T:
        sub     %esp, 8
        mov     %eax, 123
        mov     DWORD PTR [%esp], %ebx
        mov     %ebx, DWORD PTR [%esp+16]
        mov     DWORD PTR [%esp+4], %esi
        mov     %esi, DWORD PTR [%esp+12]
        imul    %ecx, %ebx, 123
        mov     %ebx, DWORD PTR [%esp]
        mul     %esi
        mov     %esi, DWORD PTR [%esp+4]
        add     %esp, 8
        lea     %edx, [%ecx+%edx]
        ret

llvm-svn: 12692
 2004-04-06 04:29:36 +00:00
Chris Lattner
dd0d31ca2a Improve code generation of long shifts by 32. 
On this testcase:

long %test(long %X) {
        %Y = shr long %X, ubyte 32
        ret long %Y
}

instead of:
t:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EAX, DWORD PTR [%ESP + 8]
        sar %EAX, 0
        mov %EDX, 0
        ret


we now emit:
test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EAX, DWORD PTR [%ESP + 8]
        mov %EDX, 0
        ret

llvm-svn: 12688
 2004-04-06 03:42:38 +00:00
Chris Lattner
7eb61104dc Bugfixes: inc/dec don't set the carry flag! 
llvm-svn: 12687
 2004-04-06 03:36:57 +00:00
Chris Lattner
8cdbb1fe84 Improve code for passing constant longs as arguments to function calls. 
For example, on this instruction:

        call void %test(long 1234)

Instead of this:
        mov %EAX, 1234
        mov %ECX, 0
        mov DWORD PTR [%ESP], %EAX
        mov DWORD PTR [%ESP + 4], %ECX
        call test

We now emit this:
        mov DWORD PTR [%ESP], 1234
        mov DWORD PTR [%ESP + 4], 0
        call test

llvm-svn: 12686
 2004-04-06 03:23:00 +00:00
Chris Lattner
2738d6d4a4 Emit more efficient 64-bit operations when the RHS is a constant, and one 
of the words of the constant is zeros.  For example:
  Y = and long X, 1234

now generates:
  Yl = and Xl, 1234
  Yh = 0

instead of:
  Yl = and Xl, 1234
  Yh = and Xh, 0

llvm-svn: 12685
 2004-04-06 03:15:53 +00:00
Chris Lattner
bdbedf9523 Fix typeo 
llvm-svn: 12684
 2004-04-06 02:13:25 +00:00
Chris Lattner
606639ed1a Add support for simple immediate handling to long instruction selection. 
This allows us to handle code like 'add long %X, 123456789012' more efficiently.

llvm-svn: 12683
 2004-04-06 02:11:49 +00:00
Chris Lattner
e84f12a165 The sbb instructions really ARE sbb's, not adc's 
llvm-svn: 12682
 2004-04-06 02:02:11 +00:00
Chris Lattner
0808f5daa5 Implement negation of longs efficiently. For this testcase: 
long %test(long %X) {
        %Y = sub long 0, %X
        ret long %Y
}

We used to generate:

test:
        sub %ESP, 4
        mov DWORD PTR [%ESP], %ESI
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %ESI, DWORD PTR [%ESP + 12]
        mov %EAX, 0
        mov %EDX, 0
        sub %EAX, %ECX
        sbb %EDX, %ESI
        mov %ESI, DWORD PTR [%ESP]
        add %ESP, 4
        ret

Now we generate:

test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        neg %EAX
        adc %EDX, 0
        neg %EDX
        ret

llvm-svn: 12681
 2004-04-06 01:48:06 +00:00
Chris Lattner
56dcdcf638 Minor tweak to avoid an extra reg-reg copy that the register allocator has to eliminate 
llvm-svn: 12680
 2004-04-06 01:25:33 +00:00
Chris Lattner
42cf317fca Two changes: 
* In promote32, if we can just promote a constant value, do so instead of
    promoting a constant dynamically.
  * In visitReturn inst, actually USE the promote32 argument that takes a
    Value*

The end result of this is that we now generate this:

test:
        mov %EAX, 0
        ret

instead of...

test:
        mov %AX, 0
        movzx %EAX, %AX
        ret

for:

ushort %test() {
        ret ushort 0
}

llvm-svn: 12679
 2004-04-06 01:21:00 +00:00
Chris Lattner
9236135e8f Support getelementptr instructions which use uint's to index into structure 
types and can have arbitrary 32- and 64-bit integer types indexing into
sequential types.

llvm-svn: 12653
 2004-04-05 01:30:19 +00:00
Alkis Evlogimenos
27ed33c309 Clean up code a bit. 
llvm-svn: 12615
 2004-04-02 18:11:32 +00:00
Alkis Evlogimenos
85e007a6dc Fix type in comments 
llvm-svn: 12611
 2004-04-02 16:02:50 +00:00
Alkis Evlogimenos
84ee10f9e1 Fix type in instruction builder instantiation 
llvm-svn: 12610
 2004-04-02 15:51:03 +00:00
Alkis Evlogimenos
20b074682c Add more ADC and SBB variants 
llvm-svn: 12607
 2004-04-02 07:11:10 +00:00
Chris Lattner
b6e4e5a95e Simplify code by using the more powerful BuildMI forms. 
Implement a small optimization.  In test/Regression/CodeGen/X86/select.ll,
we now generate this for foldSel3:

foldSel3:
        mov %AL, BYTE PTR [%ESP + 4]
        fld DWORD PTR [%ESP + 8]
        fld DWORD PTR [%ESP + 12]
        mov %EAX, DWORD PTR [%ESP + 16]
        mov %ECX, DWORD PTR [%ESP + 20]
        cmp %EAX, %ECX
        fxch %ST(1)
        fcmovae %ST(0), %ST(1)
***     fstp %ST(1)
        ret

Instead of:

foldSel3:
        mov %AL, BYTE PTR [%ESP + 4]
        fld DWORD PTR [%ESP + 8]
        fld DWORD PTR [%ESP + 12]
        mov %EAX, DWORD PTR [%ESP + 16]
        mov %ECX, DWORD PTR [%ESP + 20]
        cmp %EAX, %ECX
        fxch %ST(1)
        fcmovae %ST(0), %ST(1)
***     fxch %ST(1)
***     fstp %ST(0)
        ret

In practice, this only effects code size: performance should be basically
unaffected.

llvm-svn: 12588
 2004-04-01 04:06:09 +00:00
Chris Lattner
78027ca4ff Wrap at 80 cols 
llvm-svn: 12587
 2004-04-01 04:03:27 +00:00
Chris Lattner
2e0755a058 Generate slightly smaller code, "test R, R" instead of "cmp R, 0" 
llvm-svn: 12579
 2004-03-31 22:22:36 +00:00
Chris Lattner
97e8b80649 The X86 backend no longer needs the select lowering pass. 
llvm-svn: 12578
 2004-03-31 22:03:46 +00:00
Chris Lattner
e5d60adc20 Codegen FP select instructions into X86 conditional moves. Annoyingly enough 
the X86 does not support a full set of fp cmove instructions, so we can't always
fold the condition into the select.  :(  Yuck.

llvm-svn: 12577
 2004-03-31 22:03:35 +00:00
Chris Lattner
d50df93168 Add support for floating point conditional move instructions 
llvm-svn: 12576
 2004-03-31 22:02:36 +00:00
Chris Lattner
4d543b4201 Add support for FP cmoves 
llvm-svn: 12575
 2004-03-31 22:02:21 +00:00
Chris Lattner
e4fa3010db Add FP conditional move instructions, which annoyingly have special properties 
that require the asmwriter to be extended (printing implicit uses before the
explicit operands)

llvm-svn: 12574
 2004-03-31 22:02:13 +00:00
Chris Lattner
f477746a61 Fold comparisons into select instructions, making much better code and 
using our broad selection of movcc instructions.  :)

llvm-svn: 12560
 2004-03-30 22:39:09 +00:00
Chris Lattner
6c1dd729d3 Implement spill code folding for all of the conditional move instructions 
llvm-svn: 12554
 2004-03-30 21:29:47 +00:00
Chris Lattner
ff016bd6fe Add direct support for integer select instructions, though we still don't support 
folding compares into the select yet.

llvm-svn: 12553
 2004-03-30 21:22:00 +00:00
Chris Lattner
57968a98df Fix some serious bugs in the cmov descriptions, which didn't cause a problem because 
we never generated them

Make indentation a bit more consistent

llvm-svn: 12549
 2004-03-30 20:18:02 +00:00
Chris Lattner
95942c021a Fix a fairly major performance problem. If a PHI node had a constant as 
an incoming value from a block, the selector would evaluate the constant
at the TOP of the block instead of at the end of the block.  This made the
live range for the constant span the entire block, increasing register
pressure needlessly.

llvm-svn: 12542
 2004-03-30 19:10:12 +00:00
Chris Lattner
87479998f2 Add the select lowering pass to get initial support for select instructions 
llvm-svn: 12541
 2004-03-30 18:41:59 +00:00
Chris Lattner
b8f179cb9b Malloc doesn't kill a load. This patch need not go into 1.2 though. 
llvm-svn: 12500
 2004-03-18 17:01:26 +00:00
Chris Lattner
ef7c1e9f7f Fix a really nasty bug that was breaking ijpeg in LLC mode. We were incorrectly 
folding load instructions into other instructions across free instruction
boundaries.  Perhaps this will also fix the other strange failures?

llvm-svn: 12494
 2004-03-18 06:29:54 +00:00
Alkis Evlogimenos
6ac147a7fb Add LAHF instruction 
llvm-svn: 12424
 2004-03-15 17:20:14 +00:00
Alkis Evlogimenos
2b94b048a9 Another API change to MRegisterInfo::foldMemoryOperand. Instead of a 
MachineBasicBlock::iterator take a MachineInstr*.

llvm-svn: 12392
 2004-03-14 20:14:27 +00:00
Alkis Evlogimenos
ff9482b664 Change MRegisterInfo::foldMemoryOperand to return the folded 
instruction to make the API more flexible.

llvm-svn: 12386
 2004-03-14 07:19:51 +00:00
Chris Lattner
b45245327e It helps if I save the file. :) 
llvm-svn: 12357
 2004-03-13 00:24:52 +00:00
Chris Lattner
f7bc6fd913 Rename the intrinsic enum values for llvm.va_* from Intrinsic::va_* to 
Intrinsic::va*.  This avoid conflicting with macros in the stdlib.h file.

llvm-svn: 12356
 2004-03-13 00:24:00 +00:00
Alkis Evlogimenos
da990ad8a4 Add support for a wider range of CMOV instructions. 
llvm-svn: 12336
 2004-03-12 17:59:56 +00:00
Misha Brukman
992e44e3c5 Fix compilation on Sparc: assert(0) => abort() 
llvm-svn: 12289
 2004-03-11 19:08:24 +00:00
Alkis Evlogimenos
a13672fd71 Check if printing of implicit uses is required for all types of shift 
instructions.

llvm-svn: 12258
 2004-03-09 06:10:15 +00:00
Alkis Evlogimenos
7c0224327e Differentiate between extended precision floats (80-bit) and double precision floats (64-bit) 
llvm-svn: 12254
 2004-03-09 03:37:54 +00:00
Alkis Evlogimenos
f86d2df13d Use newly added API to emit bytes for instructions that gas misassembles 
llvm-svn: 12253
 2004-03-09 03:35:34 +00:00
Alkis Evlogimenos
085957be0b Add emitInstruction() API so that we can get the bytes of a simple instruction 
llvm-svn: 12252
 2004-03-09 03:34:53 +00:00
Alkis Evlogimenos
813daf05c3 Constify things a bit 
llvm-svn: 12251
 2004-03-09 03:30:12 +00:00
Chris Lattner
a55628694a Implement folding explicit load instructions into binary operations. For a 
testcase like this:

int %test(int* %P, int %A) {
        %Pv = load int* %P
        %B = add int %A, %Pv
        ret int %B
}

We now generate:
test:
        mov %ECX, DWORD PTR [%ESP + 4]
        mov %EAX, DWORD PTR [%ESP + 8]
        add %EAX, DWORD PTR [%ECX]
        ret

Instead of:
test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EAX, DWORD PTR [%EAX]
        add %EAX, %ECX
        ret

... saving one instruction, and often a register.  Note that there are a lot
of other instructions that could use this, but they aren't handled.  I'm not
really interested in adding them, but mul/div and all of the FP instructions
could be supported as well if someone wanted to add them.

llvm-svn: 12204
 2004-03-08 01:58:35 +00:00
Chris Lattner
9a9b1c4822 Rearrange and refactor some code. No functionality changes. 
llvm-svn: 12203
 2004-03-08 01:18:36 +00:00
Alkis Evlogimenos
65649a50e9 Add memory operand version of conditional move. 
llvm-svn: 12190
 2004-03-07 03:19:11 +00:00
Brian Gaeke
0b913593ae make -print-machineinstrs work for both SparcV9 and X86 
llvm-svn: 12122
 2004-03-04 19:16:23 +00:00