6 Commits

Author	SHA1	Message	Date
Eli Friedman	5cd755549b	PR9998: ashr exact %x, 31 is not equivalent to sdiv exact %x, -2147483648. ... llvm-svn: 132097	2011-05-25 23:26:20 +00:00
Chris Lattner	4362c74d13	add PR# ... llvm-svn: 125455	2011-02-13 08:27:31 +00:00
Chris Lattner	72b78e11ba	implement instcombine folding for things like (x >> c) < 42. ... We were previously simplifying divisions, but not right shifts! llvm-svn: 125454	2011-02-13 08:07:21 +00:00
Chris Lattner	6e84f48cd8	Enhance a bunch of transformations in instcombine to start generating ... exact/nsw/nuw shifts and have instcombine infer them when it can prove that the relevant properties are true for a given shift without them. Also, a variety of refactoring to use the new patternmatch logic thrown in for good luck. I believe that this takes care of a bunch of related code quality issues attached to PR8862. llvm-svn: 125267	2011-02-10 05:36:31 +00:00
Chris Lattner	72ac244f4e	Enhance the "compare with shift" and "compare with div" ... optimizations to be much more aggressive in the face of exact/nsw/nuw div and shifts. For example, these (which are the same except the first is 'exact' sdiv: define i1 @sdiv_icmp4_exact(i64 %X) nounwind { %A = sdiv exact i64 %X, -5 ; X/-5 == 0 --> x == 0 %B = icmp eq i64 %A, 0 ret i1 %B } define i1 @sdiv_icmp4(i64 %X) nounwind { %A = sdiv i64 %X, -5 ; X/-5 == 0 --> x == 0 %B = icmp eq i64 %A, 0 ret i1 %B } compile down to: define i1 @sdiv_icmp4_exact(i64 %X) nounwind { %1 = icmp eq i64 %X, 0 ret i1 %1 } define i1 @sdiv_icmp4(i64 %X) nounwind { %X.off = add i64 %X, 4 %1 = icmp ult i64 %X.off, 9 ret i1 %1 } This happens when you do something like: (ptr1-ptr2) == 42 where the pointers are pointers to non-unit types. llvm-svn: 125266	2011-02-10 05:23:05 +00:00
Chris Lattner	7b6a968f5d	enhance vmcore to know that udiv's can be exact, and add a trivial ... instcombine xform to exercise this. Nothing forms exact udivs yet though. This is progress on PR8862 llvm-svn: 124992	2011-02-06 21:44:57 +00:00