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Author SHA1 Message Date
Krzysztof Parzyszek
7ff439af60 [RDF] Improvements to copy propagation 
- Allow any instruction to define equality between registers.
- Keep the DFG updated.

llvm-svn: 258075
 2016-01-18 20:43:57 +00:00
Krzysztof Parzyszek
fa20b3ad96 [RDF] Improve compile-time performance of dead code elimination 
llvm-svn: 258074
 2016-01-18 20:42:47 +00:00
Krzysztof Parzyszek
a9c1a4bbfd [RDF] Allow unlinking ref nodes from data-flow chains only 
llvm-svn: 258073
 2016-01-18 20:41:34 +00:00
Craig Topper
7b0b0f6cca [TableGen] Use FoldingSets instead of DenseMaps to unique UnOpInit, BinOpInit and TernOpInit. This remove the memory needed to store the key for the DenseMap. NFC 
llvm-svn: 258071
 2016-01-18 20:36:06 +00:00
Craig Topper
4b8a0e95c4 [TableGen] Fix an assert I missed in r258063. 
llvm-svn: 258068
 2016-01-18 19:59:05 +00:00
Tom Stellard
a09c2fcc35 TargetLowering: Improve handling of (setcc ([sz]ext x) 0, cc) in SimplifySetCC 
Summary:
When SimplifySetCC sees a setcc node that compares the result of a
value extension operation with a constant, it tries to simplify the
setcc node by eliminating the extension and shrinking the constant.

If shrinking the inputs to setcc is deemed not desirable by the target
(e.g. the target does not want a setcc comparing i1 values), then it
is still possible to optimize this sequence in some cases.

This patch adds the following combines to SimplifySetCC when shrinking setcc
inputs is not desirable:

(setcc ([sz]ext (setcc x, y, cc)), 0, setne) -> (setcc (x, y, cc))
(setcc ([sz]ext (setcc x, y, cc)), 0, seteq) -> (setcc (x, Y, !cc))

There are no tests for this yet, but once AMDGPU correctly implements
TargetLowering::isTypeDesirableForOp(), this new combine will be
exercised by the existing CodeGen/AMDGPU/setcc-opt.ll test.

Reviewers: resistor, arsenm

Subscribers: jroelofs, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D15034

llvm-svn: 258067
 2016-01-18 19:55:21 +00:00
Craig Topper
a5ac333af9 [TableGen] Merge the SuperClass Record and SMRange vector into a single vector. This removes the state needed to manage the extra vector thus reducing the size of the Record class. NFC 
llvm-svn: 258065
 2016-01-18 19:52:37 +00:00
Craig Topper
c7ba465dbf [TableGen] Reorder fields in Record class to optimize memory usage. NFC 
llvm-svn: 258064
 2016-01-18 19:52:29 +00:00
Craig Topper
22fa1c4ac6 [TableGen] Allocate the Init pointer array for BitsInit/ListInit after the BitsInit/ListInit object itself. Saves a bit of memory. NFC 
llvm-svn: 258063
 2016-01-18 19:52:24 +00:00
Sanjay Patel
5b6411a86b combine clauses with same output ; NFCI 
llvm-svn: 258062
 2016-01-18 19:17:58 +00:00
Simon Atanasyan
d7e809052f [llvm-readobj][ELF] s/dyn_rela_/dyn_rel_/ No functional changes. 
Follow up to r258001. These template functions might return both REL and RELA
relocations. The 'rel' noun looks less ambiguous.

llvm-svn: 258060
 2016-01-18 18:52:04 +00:00
Sanjay Patel
4f9ef4b7f0 use m_OneUse ; NFCI 
llvm-svn: 258059
 2016-01-18 18:36:38 +00:00
Sanjay Patel
08bcf5f0bd fix variable names, typos ; NFC 
llvm-svn: 258058
 2016-01-18 18:28:09 +00:00
Sanjay Patel
5dcccbe4e7 fix typo; NFC 
llvm-svn: 258057
 2016-01-18 17:50:23 +00:00
Igor Breger
7327a3bf3b AVX512: Masked store intrinsic implementation. 
Implemented intrinsic for the follow instructions (store) : VMOVDQU8/16/32/64, VMOVDQA32/64, VMOVAPS/PD, VMOVUPS/PD.

Differential Revision: http://reviews.llvm.org/D16271

llvm-svn: 258047
 2016-01-18 13:52:57 +00:00
Elena Demikhovsky
0090e74974 Added Cannonlake processor to X86 Target 
Differential Revision: http://reviews.llvm.org/D16289

llvm-svn: 258046
 2016-01-18 13:00:31 +00:00
Igor Breger
74d74d20c2 AVX512 : Change v8i1 bitconvert GR8 pattern, remove unnecessary movzbl instruction. 
code example , previous implementation.
    movzbl  %dil, %eax
    kmovw  %eax, %k0
  new code
    kmovw  %edi, %k0

Differential Revision: http://reviews.llvm.org/D16287

llvm-svn: 258045
 2016-01-18 12:02:45 +00:00
Oliver Stannard
ec1b7475d8 [ARM] Operands for PKHTB alias should be swapped 
When the shift immediate is zero, PKHTB is an alias for PKHBT, but the order of
the input operands needs to be swapped.

Differential Revision: http://reviews.llvm.org/D16288

llvm-svn: 258044
 2016-01-18 11:56:35 +00:00
Michael Zuckerman
b0cb95e40b [AVX512] adding AVXVBMI feature flag 
Fixing wrong typo (avx515) → (avx512) 
Review over the shoulder by asaf . 

Differential Revision: http://reviews.llvm.org/D16190

llvm-svn: 258041
 2016-01-18 11:12:47 +00:00
Xinliang David Li
7d5bc597d7 [Coverage] move a local var to be BinaryCoverageReader's member 
The symtab is logically referenced beyond the call to the create
method. This changes makes sure its lifetime matches that of
the reader.

llvm-svn: 258036
 2016-01-18 06:48:01 +00:00
Junmo Park
d69eaa7d57 Remove extra whitespace. NFC. 
llvm-svn: 258035
 2016-01-18 06:42:51 +00:00
Lang Hames
c6ee17b71b [Orc] Revert r258031 - it broke the builders. 
llvm-svn: 258034
 2016-01-18 01:51:51 +00:00
Amaury Sechet
2927bd4ab2 Fix typo in the C API comments 
llvm-svn: 258033
 2016-01-18 01:06:52 +00:00
Lang Hames
2d38694617 [Orc] Expand a comment explaining a unit test. 
llvm-svn: 258032
 2016-01-18 01:00:19 +00:00
Lang Hames
c96132f0d0 [Orc] Enable ORC execution unit tests on non-windows platforms. 
Previously these were Darwin-only. Since the switch to direct binary emission
of stubs, trampolines and resolver blocks, these should work on other *nix
platforms too.

These tests can be enabled on Windows once known issues with ORC's handling of
Windows symbol mangling (see e.g. https://llvm.org/PR25940) have been fixed.

llvm-svn: 258031
 2016-01-18 00:47:25 +00:00
Xinliang David Li
1a36d26015 minor comment clean and add a method \NFC 
llvm-svn: 258030
 2016-01-18 00:26:33 +00:00
Eduard Burtescu
4fdc6b48ef Revert assert added in rL258028 as the alloca and OtherPtr types may differ in address space. 
llvm-svn: 258029
 2016-01-18 00:20:34 +00:00
Eduard Burtescu
313153c723 [opaque pointer types] Alloca: use getAllocatedType() instead of getType()->getPointerElementType(). 
Reviewers: mjacob

Subscribers: llvm-commits, dblaikie

Differential Revision: http://reviews.llvm.org/D16272

llvm-svn: 258028
 2016-01-18 00:10:01 +00:00
Sanjay Patel
8534c989be fix variable names; NFC 
llvm-svn: 258027
 2016-01-17 23:18:05 +00:00
Sanjay Patel
efea56a88c fix typos; NFC 
llvm-svn: 258026
 2016-01-17 23:13:48 +00:00
Davide Italiano
fe46acd825 [Support/ELF] Add Sun machine-independent extesions DT_* constants. 
llvm-svn: 258025
 2016-01-17 22:46:50 +00:00
Manuel Jacob
51a8af4316 [opaque pointer types] [breaking-change] [NFC] SimplifyGEPInst: take the source element type of the GEP as an argument. 
Patch by Eduard Burtescu.

Reviewers: dblaikie, mjacob

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16281

llvm-svn: 258024
 2016-01-17 22:46:43 +00:00
Manuel Jacob
67d88f5507 [opaque pointer types] [NFC] CallSite: use getFunctionType() instead of going through PointerType::getElementType. 
Patch by Eduard Burtescu.

Reviewers: dblaikie, mjacob

Subscribers: dsanders, llvm-commits, dblaikie

Differential Revision: http://reviews.llvm.org/D16273

llvm-svn: 258023
 2016-01-17 22:37:39 +00:00
Manuel Jacob
5fe6c9d94d [NFC] Remove one dead PointerType::getElementType() call. 
Reviewers: dblaikie, mjacob

Subscribers: llvm-commits, dblaikie

Patch by Eduard Burtescu.

Differential Revision: http://reviews.llvm.org/D16274

llvm-svn: 258022
 2016-01-17 22:28:28 +00:00
Craig Topper
677a8c0da1 [TableGen] Keep a returned const reference instead of making a copy. NFC 
llvm-svn: 258020
 2016-01-17 20:38:21 +00:00
Craig Topper
6dbe9b8c99 [TableGen] Replace instructions() with getInstructionsByEnumValue(). No need to make an iterator_range when we already have a function that returns an ArrayRef. NFC 
llvm-svn: 258019
 2016-01-17 20:38:18 +00:00
Craig Topper
a7f2a9aef5 [TableGen] Return ArrayRef instead of a std::vector reference from getInstructionsByEnumValue(). NFC 
llvm-svn: 258018
 2016-01-17 20:38:14 +00:00
Craig Topper
f11bd508b4 [TableGen] Use std::find instead of a manual loop. NFC 
llvm-svn: 258017
 2016-01-17 19:51:14 +00:00
Sanjoy Das
aa011535f3 [IndVars] Fix PR25576 
`LCSSASafePhiForRAUW` as computed was incorrect -- in cases like
these (this exact example does not actually trigger the bug):

define i32 @f(i32 %n, i1* %c) {
entry:
  br label %outer.loop

outer.loop:
  br label %inner.loop

inner.loop:
  %iv = phi i32 [ 0, %outer.loop ], [ %iv.inc, %inner.loop ]
  %iv.inc = add nuw nsw i32 %iv, 1
  %tc = udiv i32 %n, 13
  %be.cond = icmp ult i32 %iv, %tc
  br i1 %be.cond, label %inner.loop, label %inner.exit

inner.exit:
  %iv.lcssa = phi i32 [ %iv, %inner.loop ]
  %outer.be.cond = load volatile i1, i1* %c
  br i1 %outer.be.cond, label %outer.loop, label %leave

leave:
  %iv.lcssa.lcssa = phi i32 [ %iv.lcssa, %inner.exit ]
  ret i32 %iv.lcssa.lcssa
}

`LCSSASafePhiForRAUW` is true for `%iv.lcssa` when re-rewriting the exit
value of `%iv` for `%inner.loop` to `%tc` (this can happen due to
`SCEVExpander::findExistingExpansion`), but the RAUW breaks LCSSA.

To fix this, instead of computing `SafePhi` with special logic, decide
the safety of RAUW directly via `replacementPreservesLCSSAForm`.

llvm-svn: 258016
 2016-01-17 18:12:52 +00:00
Sanjoy Das
2c8efc2a82 [IndVars] Use emplace_back; NFC 
llvm-svn: 258015
 2016-01-17 18:12:48 +00:00
Sanjoy Das
6416c4aa58 [SCEV] Use range for; NFC 
llvm-svn: 258014
 2016-01-17 18:12:45 +00:00
Simon Pilgrim
cfe1acc838 [X86][AVX512] Regenerate v1 shuffle tests 
llvm-svn: 258013
 2016-01-17 14:53:17 +00:00
Michael Zuckerman
65f549e895 [AVX512] adding AVXVBMI feature flag 
The feature flag is for VPERMB,VPERMI2B,VPERMT2B and VPMULTISHIFTQB instructions. 
More about the instruction can be found in:
hattps://software.intel.com/sites/default/files/managed/07/b7/319433-023.pdf

Differential Revision: http://reviews.llvm.org/D16190

llvm-svn: 258012
 2016-01-17 13:42:12 +00:00
Artur Pilipenko
de18f1640e Fix buildbot failure introduced by 258010. Remove local variables became unused. 
llvm-svn: 258011
 2016-01-17 12:59:40 +00:00
Artur Pilipenko
bb5abf9eb3 Push isDereferenceableAndAlignedPointer down into isSafeToLoadUnconditionally 
Reviewed By: reames

Differential Revision: http://reviews.llvm.org/D16226

llvm-svn: 258010
 2016-01-17 12:35:29 +00:00
Igor Breger
908122c363 AVX512: Use MemIntrinsicSDNode to implement load/store intrinsic. 
Differential Revision: http://reviews.llvm.org/D16184

llvm-svn: 258009
 2016-01-17 12:10:24 +00:00
Michael Zuckerman
04a3249a24 [AVX512] Adding VPERMW/D/Q VPERMPS/D Intrinsics 
Differential Revision: http://reviews.llvm.org/D16189

llvm-svn: 258008
 2016-01-17 11:33:29 +00:00
Craig Topper
dd4cad9576 [TableGen] Use a StringRef instead of creating a new std::string. It gets passed to a function that takes a StringRef anyway. NFC 
llvm-svn: 258007
 2016-01-17 08:47:02 +00:00
Michael Zuckerman
365c9dfcf3 [AVX512] Adding VPERMQ VPERMPD Intrinsics 
Differential Revision: http://reviews.llvm.org/D16194

llvm-svn: 258006
 2016-01-17 08:32:14 +00:00
Craig Topper
b87a77e698 [TableGen] Changes to AsmWriterEmitter to remove the CodeGenInstruction to AsmWriterInst map. NFC 
Adds the corresponding CodeGenInstruction number to each AsmWriterInst. Then write all the operand uniqueing loops using the AsmWriterInst array and indices. Then use the CodeGenInstruction index to fill out the OpCodeInfo array.

llvm-svn: 258005
 2016-01-17 08:05:33 +00:00