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52 Commits

Author SHA1 Message Date
Eric Christopher
716614f126 Rework arm fast isel branch and compare code. 
llvm-svn: 114226
 2010-09-17 22:28:18 +00:00
Eric Christopher
c6075a71ad Emit libcalls for SDIV, this requires some call infrastructure 
that needs to be shared a bit more widely around.

llvm-svn: 113886
 2010-09-14 23:03:37 +00:00
Eric Christopher
01d361f9ed Start sketching out ARM fast-isel calls. 
llvm-svn: 113662
 2010-09-10 23:18:12 +00:00
Eric Christopher
1364e542aa For consistency. 
llvm-svn: 113659
 2010-09-10 23:10:30 +00:00
Eric Christopher
54e138031e Fix build error. 
llvm-svn: 113566
 2010-09-10 00:35:09 +00:00
Eric Christopher
92506682eb Update comments, reorganize some code, rename variables to be 
more clear.  No functional change.

llvm-svn: 113565
 2010-09-10 00:34:35 +00:00
Eric Christopher
06f4af2ef4 64-bit fp loads can come straight out of the constant pool, not as 
bad as I'd thought.

llvm-svn: 113561
 2010-09-09 23:50:00 +00:00
Eric Christopher
3c86728bd6 SIToFP and FPToSI conversions work only on fp-reg to fp-reg. Move 
some data around and implement a couple of move routines to do this.

llvm-svn: 113546
 2010-09-09 21:44:45 +00:00
Eric Christopher
d5f271d31e New "move to fp reg" routine. Use it. 
llvm-svn: 113537
 2010-09-09 20:49:25 +00:00
Eric Christopher
7208671884 "Strike that, reverse it." -- Mr. Wonka. 
Truncate when truncating, extend when extending.

llvm-svn: 113536
 2010-09-09 20:36:19 +00:00
Eric Christopher
38194e51cc Add FPTrunc, fix some bugs where I forgot to update the value map. 
llvm-svn: 113533
 2010-09-09 20:26:31 +00:00
Eric Christopher
2ba28d3889 Basic FP->Int, Int->FP conversions. 
llvm-svn: 113523
 2010-09-09 18:54:59 +00:00
Eric Christopher
e5bf22fd67 Nuke whitespace and fix some indenting. 
llvm-svn: 113463
 2010-09-09 01:06:51 +00:00
Eric Christopher
8c3a582b5f Handle 64-bit floating point binops as well. 
llvm-svn: 113461
 2010-09-09 01:02:03 +00:00
Eric Christopher
f2f2b06719 Basic 32-bit FP operations. 
llvm-svn: 113459
 2010-09-09 00:53:57 +00:00
Eric Christopher
88c13fcb96 Handle float->double extension. 
llvm-svn: 113455
 2010-09-09 00:26:48 +00:00
Eric Christopher
ebfbac39cf Rewrite TargetMaterializeConstant splitting it out into two functions 
for integer and fp constants. Implement todo to use vfp3 instructions
to materialize easy constants if we can.

llvm-svn: 113453
 2010-09-09 00:19:41 +00:00
Eric Christopher
66c62991e0 Very basic compare support. 
llvm-svn: 113440
 2010-09-08 23:13:45 +00:00
Eric Christopher
2a86c17b8d Delete dead code. 
llvm-svn: 113436
 2010-09-08 22:58:35 +00:00
Eric Christopher
bc029c3eb0 Make the loads/stores match the type we really want to store. 
llvm-svn: 113417
 2010-09-08 21:49:50 +00:00
Eric Christopher
4108aae8d3 Rewrite TargetMaterializeConstant. 
llvm-svn: 113387
 2010-09-08 18:56:34 +00:00
Eric Christopher
d8a89e8737 Simple branch instruction support. 
llvm-svn: 112923
 2010-09-03 00:35:47 +00:00
Eric Christopher
3adad3b492 Add basic support for materializing constants (including fp) and 
stores.

llvm-svn: 112912
 2010-09-02 23:43:26 +00:00
Eric Christopher
6c3fa8c78f Clang's -ccc-host-triple was ignoring the arch specifier on my triple, 
I don't need to implement this quite yet - and not for ConstantInt anyhow.

llvm-svn: 112798
 2010-09-02 02:30:46 +00:00
Eric Christopher
cf0b12d117 This should be TargetMaterializeConstant instead. 
llvm-svn: 112795
 2010-09-02 01:48:11 +00:00
Eric Christopher
9dc3582a82 One definition of isThumb is plenty, thanks. 
llvm-svn: 112793
 2010-09-02 01:39:14 +00:00
Eric Christopher
3aa2bb55d8 Rework arm fast-isel load and store handling. Move offset computation 
into the "address selection" routine and handle constant materialization
for stores.

llvm-svn: 112788
 2010-09-02 00:53:56 +00:00
Eric Christopher
abf61f76c9 Some basic store support. 
llvm-svn: 112752
 2010-09-01 22:16:27 +00:00
Eric Christopher
92238b2b5a Add some more load types in. 
llvm-svn: 112721
 2010-09-01 18:01:32 +00:00
Eric Christopher
b2756a8b99 Rewrite slightly so we can expand for floating point types easier. 
llvm-svn: 112568
 2010-08-31 01:28:42 +00:00
Eric Christopher
21b355b522 If we have an unhandled type then assert, we shouldn't get here for 
things we can't handle.

llvm-svn: 112559
 2010-08-30 23:48:26 +00:00
Eric Christopher
1bf07e75ac Do type checks before we bother to do everything else. 
llvm-svn: 112039
 2010-08-25 08:43:57 +00:00
Eric Christopher
9e3831d7a9 Reorganize load mechanisms. Handle types in a little less fixed way. 
Fix some todos.  No functional change.

llvm-svn: 112031
 2010-08-25 07:23:49 +00:00
Eric Christopher
a2d3859ee7 Fix predicate and add a comment. 
llvm-svn: 111981
 2010-08-24 22:34:11 +00:00
Eric Christopher
5477fa47fd Rework braindead conditionals I put in yesterday. 
llvm-svn: 111974
 2010-08-24 22:07:27 +00:00
Eric Christopher
10422f70dc Fix thumb2 mode loads to have the correct operand ordering. Add a todo 
to fix this in the port.

llvm-svn: 111973
 2010-08-24 22:03:02 +00:00
Eric Christopher
c2ed70d52b Update comment. 
llvm-svn: 111887
 2010-08-24 01:10:52 +00:00
Eric Christopher
5f3382bacc Fix the opcode and the operands for the load instruction. 
llvm-svn: 111885
 2010-08-24 01:10:04 +00:00
Eric Christopher
5d1289db95 Add register class hack that needs to go away, but makes it more obvious 
that it needs to go away.  Use loadRegFromStackSlot where possible.

Also, remember to update the value map.

llvm-svn: 111883
 2010-08-24 00:50:47 +00:00
Eric Christopher
696d6ee9d7 Add some more debugging code, make it more obvious that RegOffset is 
getting an address for an object and select some default values.

llvm-svn: 111871
 2010-08-24 00:07:24 +00:00
Eric Christopher
a1652c6ea6 Don't need the extra register here. 
llvm-svn: 111864
 2010-08-23 23:28:04 +00:00
Eric Christopher
2f01adebca Add some more "get address into register" code and a more TODOs/FIXMEs. 
llvm-svn: 111860
 2010-08-23 23:14:31 +00:00
Eric Christopher
7ec47db6b2 Add an ARMFunctionInfo member and use it. 
llvm-svn: 111854
 2010-08-23 22:32:45 +00:00
Eric Christopher
e0d09e27f8 Start getting ARM loads/address computation going. 
llvm-svn: 111850
 2010-08-23 21:44:12 +00:00
Eric Christopher
e082792357 Fix loop conditionals (MO.isDef() asserts that it's a reg) and 
move some constraints around.

llvm-svn: 111594
 2010-08-20 00:36:24 +00:00
Eric Christopher
df3a3f5e3e Add a couple of random comments. 
llvm-svn: 111592
 2010-08-20 00:20:31 +00:00
Eric Christopher
8f9362166c Silence warning. 
llvm-svn: 111518
 2010-08-19 15:35:27 +00:00
Eric Christopher
b80df4f04e Add an AddOptionalDefs method and use it. 
llvm-svn: 111489
 2010-08-19 00:37:05 +00:00
Eric Christopher
9a8050c4e1 Copy over some overridden MI wrappers for ARM fast-isel. This is where 
we're adding predicates and optional defs to the MachineInstrs.

llvm-svn: 111222
 2010-08-17 01:25:29 +00:00
Eric Christopher
8a68f2fc40 Make arm fast-isel possible to enable via command line. 
llvm-svn: 111219
 2010-08-17 00:46:57 +00:00