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Commit Graph

141428 Commits

Author SHA1 Message Date
Nemanja Ivanovic
62aef0dfee Revert https://reviews.llvm.org/rL287679
This commit caused some miscompiles that did not show up on any of the bots.
Reverting until we can investigate the cause of those failures.

llvm-svn: 288214
2016-11-29 23:00:33 +00:00
Paul Robinson
b49319d49c Emit 'no line' information for interesting 'orphan' instructions.
DWARF specifies that "line 0" really means "no appropriate source
location" in the line table.  Use this for branch targets and some
other cases that have no specified source location, to prevent
inheriting unfortunate line numbers from physically preceding
instructions (which might be from completely unrelated source).

Differential Revision: http://reviews.llvm.org/D24180

llvm-svn: 288212
2016-11-29 22:41:16 +00:00
Simon Pilgrim
c19ac2eaaa [X86][AVX512VL] Improved testing of vcvtpd2ps, vcvtpd2dq/vcvtpd2udq and vcvttpd2dq/vcvttpd2udq implicit zeroing of upper 64-bits of xmm result
Ensure that masked instruction doesn't assume implicit zeroing.

llvm-svn: 288211
2016-11-29 22:38:30 +00:00
Adam Nemet
acff41aed1 [GVN] Basic optimization remark support
[recommiting patches one-by-one to see which breaks the stage2 LTO bot]

Follow-on patches will add more interesting cases.

The goal of this patch-set is to get the GVN messages printed in
opt-viewer from Dhrystone as was presented in my Dev Meeting talk.  This
is the optimization view for the function (the last remark in the
function has a bug which is fixed in this series):
http://lab.llvm.org:8080/artifacts/opt-view_test-suite/build/SingleSource/Benchmarks/Dhrystone/CMakeFiles/dry.dir/html/_org_test-suite_SingleSource_Benchmarks_Dhrystone_dry.c.html#L430

Differential Revision: https://reviews.llvm.org/D26488

llvm-svn: 288210
2016-11-29 22:37:01 +00:00
Simon Pilgrim
5db25f23aa [X86][AVX512DQVL] Improved testing of vcvtqq2ps/vcvtuqq2ps implicit zeroing of upper 64-bits of xmm result
Ensure that masked instruction doesn't assume implicit zeroing.

llvm-svn: 288209
2016-11-29 22:36:28 +00:00
Sanjay Patel
6fe7b03bee [AArch64] allow and-not-compare transform to form 'bics'
This target hook was added with D19087:
https://reviews.llvm.org/D19087

Differential Revision: https://reviews.llvm.org/D27221

llvm-svn: 288206
2016-11-29 22:28:58 +00:00
Zachary Turner
de9ef499a6 Add documentation for the PDB Module Info stream.
llvm-svn: 288205
2016-11-29 22:14:56 +00:00
Peter Collingbourne
9bdafef18f Bitcode: Add a more comprehensive multi-module test now that we have both llvm-cat and llvm-modextract.
Differential Revision: https://reviews.llvm.org/D27189

llvm-svn: 288202
2016-11-29 21:55:09 +00:00
Peter Collingbourne
52fcea9a2e Add llvm-modextract tool.
This program is for testing features that rely on multi-module bitcode files.
It takes a multi-module bitcode file, extracts one of the modules and writes
it to the output file.

Differential Revision: https://reviews.llvm.org/D26778

llvm-svn: 288201
2016-11-29 21:54:33 +00:00
Justin Lebar
d49862827a [StructurizeCFG] Fix infinite loop in rebuildSSA.
Michel Dänzer reported that r288051, "[StructurizeCFG] Use range-based
for loops", introduced a bug into rebuildSSA, wherein we were iterating
over an instruction's use list while modifying it, without taking care
to do this correctly.

llvm-svn: 288200
2016-11-29 21:49:02 +00:00
Kevin Enderby
16e2b1a344 Add to llvm-objdump the -no-leading-headers option with the use of the -macho option.
In some cases the leading headers of the file name, archive member and
architecture slice name in the output of lvm-objdump is not wanted so the
tool’s output can be directly used by scripts.  This matches the -X option
of the Apple otool(1) program.

rdar://28491674

llvm-svn: 288199
2016-11-29 21:43:40 +00:00
Peter Collingbourne
c603de6971 Add missing dependency.
llvm-svn: 288198
2016-11-29 21:02:19 +00:00
Mehdi Amini
0242771a6d Change Error unittest to use the LLVM_ENABLE_ABI_BREAKING_CHECKS instead of NDEBUG
This is consistent with the header (after r288087) and fixes the
test for the configuration:
  -DLLVM_ENABLE_ASSERTIONS=ON -DLLVM_ABI_BREAKING_CHECKS=FORCE_OFF

llvm-svn: 288196
2016-11-29 20:45:48 +00:00
Peter Collingbourne
19a350cfed Bitcode: Introduce BitcodeWriter interface.
This interface allows clients to write multiple modules to a single
bitcode file. Also introduce the llvm-cat utility which can be used
to create a bitcode file containing multiple modules.

Differential Revision: https://reviews.llvm.org/D26179

llvm-svn: 288195
2016-11-29 20:43:47 +00:00
Chad Rosier
1d8d76fe6d [AArch64] Add a basic SchedMachineModel for Falkor.
Differential Revision: https://reviews.llvm.org/D26972

llvm-svn: 288194
2016-11-29 20:00:27 +00:00
David Blaikie
0a61ed4993 Use CallSite to simplify code
llvm-svn: 288192
2016-11-29 19:42:27 +00:00
Matt Arsenault
30967b5c23 AMDGPU: Disallow exec as SMEM instruction operand
This is not in the list of valid inputs for the encoding.
When spilling, copies from exec can be folded directly
into the spill instruction which results in broken
stores.

This only fixes the operand constraints, more codegen
work is required to avoid emitting the invalid
spills.

This sort of breaks the dbg.value test. Because the
register class of the s_load_dwordx2 changes, there
is a copy to SReg_64, and the copy is the operand
of dbg_value. The copy is later dead, and removed
from the dbg_value.

llvm-svn: 288191
2016-11-29 19:39:53 +00:00
Matt Arsenault
a418419fae AMDGPU: Use SGPR_64 for argument lowerings
llvm-svn: 288190
2016-11-29 19:39:48 +00:00
Geoff Berry
980b0ef812 [LiveRangeEdit] Handle instructions with no defs correctly.
Summary:
The code in LiveRangeEdit::eliminateDeadDef() that computes isOrigDef
doesn't handle instructions in which operand 0 is not a def (e.g. KILL)
correctly.  Add a check that operand 0 is a def before doing the rest of
the isOrigDef computation.

Reviewers: qcolombet, MatzeB, wmi

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D27174

llvm-svn: 288189
2016-11-29 19:31:35 +00:00
Matt Arsenault
c97932df14 AMDGPU: Rename flat operands to match mubuf
Use vaddr/vdst for the same purposes.

This also fixes a beg in SIInsertWaits for the
operand check. The stored value operand is currently called
data0 in the single offset case, not data.

llvm-svn: 288188
2016-11-29 19:30:44 +00:00
Matt Arsenault
75513f4636 AMDGPU: Use else if
llvm-svn: 288187
2016-11-29 19:30:41 +00:00
Matt Arsenault
3c5076a42d AMDGPU: Materialize frame index before add
It isn't generally safe to fold the frame index
directly into the operand since it will possibly
not be an inline immediate after it is expanded.

This surprisingly seems to produce better code, since
the FI doesn't prevent folding other immediate operands.

llvm-svn: 288185
2016-11-29 19:20:48 +00:00
Matt Arsenault
a89faeec9c AMDGPU: Refactor immediate folding logic
Change the logic for when to fold immediates to
consider the destination operand rather than the
source of the materializing mov instruction.

No change yet, but this will allow for correctly handling
i16/f16 operands. Since 32-bit moves are used to materialize
constants for these, the same bitvalue will not be in the
register.

llvm-svn: 288184
2016-11-29 19:20:42 +00:00
Sanjay Patel
223fb45a69 [AArch64] add tests for bics; NFC
llvm-svn: 288183
2016-11-29 19:15:27 +00:00
Sanjay Patel
e0bd5a33fc [AArch64] add tests to show select transforms; NFC
llvm-svn: 288180
2016-11-29 18:35:04 +00:00
Adam Nemet
aa8eea6427 Revert "[GVN] Basic optimization remark support"
This reverts commit r288046.

Trying to see if the revert fixes a compiler crash during a stage2 LTO
build with a GVN backtrace.

llvm-svn: 288179
2016-11-29 18:32:04 +00:00
Adam Nemet
dca038fdfb Revert "[GVN, OptDiag] Include the value that is forwarded in load elimination"
This reverts commit r288047.

Trying to see if the revert fixes a compiler crash during a stage2 LTO
build with a GVN backtrace.

llvm-svn: 288178
2016-11-29 18:32:00 +00:00
Adam Nemet
ee7ff0a4cd Revert "[GVN, OptDiag] Print the interesting instructions involved in missed load-elimination"
This reverts commit r288090.

Trying to see if the revert fixes a compiler crash during a stage2 LTO
build with a GVN backtrace.

llvm-svn: 288177
2016-11-29 18:31:53 +00:00
Geoff Berry
5ed377ecc1 [AArch64] Fold spills of COPY of WZR/XZR
Summary:
In AArch64InstrInfo::foldMemoryOperandImpl, catch more cases where the
COPY being spilled is copying from WZR/XZR, but the source register is
not in the COPY destination register's regclass.

For example, when spilling:

  %vreg0 = COPY %XZR ; %vreg0:GPR64common

without this change, the code in TargetInstrInfo::foldMemoryOperand()
and canFoldCopy() that normally handles cases like this would fail to
optimize since %XZR is not in GPR64common.  So the spill code generated
would be:

  %vreg0 = COPY %XZR
  STR %vreg

instead of the new code generated:

  STR %XZR

Reviewers: qcolombet, MatzeB

Subscribers: mcrosier, aemerson, t.p.northover, llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D26976

llvm-svn: 288176
2016-11-29 18:28:32 +00:00
Mehdi Amini
6e479ee202 [docs] Typos and whitespace fixed in LTO docs.
While reading the LTO docs I fixed few small typos and whitespace issues.

Patch by: Jonas Devlieghere <jonas@devlieghere.com>

Differential Revision: https://reviews.llvm.org/D27196

llvm-svn: 288171
2016-11-29 18:00:31 +00:00
Simon Pilgrim
7d5e5aa9e9 Avoid repeated calls to MVT getSizeInBits and getScalarSizeInBits(). NFCI.
llvm-svn: 288170
2016-11-29 17:57:48 +00:00
NAKAMURA Takumi
fd2258bf45 Suppress abi-breaking.h on cygming, for now.
FIXME: Implement checks without weak for them.
llvm-svn: 288168
2016-11-29 17:32:58 +00:00
NAKAMURA Takumi
3b9d01fa78 Fix a linefeed at eof.
llvm-svn: 288167
2016-11-29 17:32:43 +00:00
Artur Pilipenko
1f94190a69 [CVP] Remove use of removed flag (-cvp-dont-process-adds) from the test
The flag was removed by 288154

llvm-svn: 288161
2016-11-29 16:43:30 +00:00
Artur Pilipenko
edf365ba79 [CVP] Remove cvp-dont-process-adds flag
The flag was introduced because the optimization controlled by the flag initially caused regressions. All the regressions were fixed some time ago and the flag has been false for quite a while. 

llvm-svn: 288154
2016-11-29 16:24:57 +00:00
Nemanja Ivanovic
325b871295 [PowerPC] Improvements for BUILD_VECTOR Vol. 1
This patch corresponds to review:
https://reviews.llvm.org/D25912

This is the first patch in a series of 4 that improve the lowering and combining
for BUILD_VECTOR nodes on PowerPC.

llvm-svn: 288152
2016-11-29 16:11:34 +00:00
Alexey Bataev
a4bfd1d3ea [SLP] Add a new test for tree vectorization starting from insertelement
instruction.

llvm-svn: 288148
2016-11-29 15:37:52 +00:00
Simon Pilgrim
f1dcbdb14d [X86] Moved getTargetConstantFromNode function so a future patch is more understandable. NFCI.
llvm-svn: 288147
2016-11-29 15:32:58 +00:00
Aditya Kumar
4982e25469 [GVNHoist] Rename variables.
Differential Revision: https://reviews.llvm.org/D27110

llvm-svn: 288142
2016-11-29 14:36:27 +00:00
Aditya Kumar
830876ec2a [GVNHoist] Enable aggressive hoisting when optimizing for code-size
Enable scalar hoisting at -Oz as it is safe to hoist scalars to a place
where they are partially needed.

Differential Revision: https://reviews.llvm.org/D27111

llvm-svn: 288141
2016-11-29 14:34:01 +00:00
Simon Pilgrim
b228a39a42 [X86][SSE] Add initial support for combining target shuffles to (V)PMOVZX.
We can only handle 128-bit vectors until we support target shuffle inputs of different size to the output.

llvm-svn: 288140
2016-11-29 14:18:51 +00:00
Simon Pilgrim
b9fd0b9690 Avoid repeated calls to MVT::getScalarSizeInBits(). NFCI.
llvm-svn: 288138
2016-11-29 13:43:08 +00:00
Simon Pilgrim
190dd3eff7 [X86][SSE] Added tests showing missed combines to (V)PMOVZX
llvm-svn: 288136
2016-11-29 13:16:11 +00:00
Chandler Carruth
2001edc7fd [PM] Fix a bad invalid densemap iterator bug in the new invalidation
logic.

Yup, the invalidation logic has an invalid iterator bug. Can't make this
stuff up.

We can recursively insert things into the map so we can't cache the
iterator into that map across those recursive calls. We did this
differently in two places. I have an end-to-end test that triggers at
least one of them. I'm going to work on a nice minimal test case that
triggers these, but I didn't want to leave the bug in the tree while
I tried to trigger it.

Also, the dense map iterator checking stuff we have now is awesome. =D

llvm-svn: 288135
2016-11-29 12:54:34 +00:00
Malcolm Parsons
2eb7118041 [StringRef] Use default member initializers and = default.
Summary: This makes the default constructor implicitly constexpr and noexcept.

Reviewers: zturner, beanz

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27094

llvm-svn: 288131
2016-11-29 10:53:18 +00:00
Alexey Bataev
62124599cb [SLPVectorizer] Improved support of partial tree vectorization.
Currently SLP vectorizer tries to vectorize a binary operation and dies
immediately after unsuccessful the first unsuccessfull attempt. Patch
tries to improve the situation, trying to vectorize all binary
operations of all children nodes in the binop tree.

Differential Revision: https://reviews.llvm.org/D25517

llvm-svn: 288115
2016-11-29 08:21:14 +00:00
Warren Ristow
61eb446384 Test commit. Comment changes. NFC.
llvm-svn: 288100
2016-11-29 02:37:13 +00:00
Peter Collingbourne
73ec8f79de Bitcode: Change expected layout of module blocks.
We now expect each module's identification block to appear immediately before
the module block. Any module block that appears without an identification block
immediately before it is interpreted as if it does not have a module block.

Also change the interpretation of VST and function offsets in bitcode.
The offset is always taken as relative to the start of the identification
(or module if not present) block, minus one word. This corresponds to the
historical interpretation of offsets, i.e. relative to the start of the file.

These changes allow for bitcode modules to be concatenated by copying bytes.

Differential Revision: https://reviews.llvm.org/D27184

llvm-svn: 288098
2016-11-29 02:27:04 +00:00
Reid Kleckner
f93801b9e8 [asan/win] Align global registration metadata to its size
This way, when the linker adds padding between globals, we can skip over
the zero padding bytes and reliably find the start of the next metadata
global.

llvm-svn: 288096
2016-11-29 01:32:21 +00:00
Tom Stellard
4f879c1dc0 AMDGPU/SI: Avoid moving PHIs to VALU when phi values are defined in scalar branches
Reviewers: arsenm

Subscribers: arsenm, llvm-commits, kzhuravl

Differential Revision: https://reviews.llvm.org/D23417

llvm-svn: 288095
2016-11-29 00:46:46 +00:00