Bruno Cardoso Lopes
257d5a5127
Position Independent Code (PIC) support [3]
...
llvm-svn: 42780
2007-10-09 03:15:11 +00:00
Duncan Sands
c358890f73
Fold the adjust_trampoline intrinsic into
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init_trampoline. There is now only one
trampoline intrinsic.
llvm-svn: 41841
2007-09-11 14:10:23 +00:00
Bruno Cardoso Lopes
144486ca7e
Changed stack allocation On LowerFORMAL_ARGUMENTS.
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Added comments about new stack allocation.
Expand SelectCC for i32 results
llvm-svn: 41527
2007-08-28 05:08:16 +00:00
Bruno Cardoso Lopes
14e39d7bcf
InlineAsm asm support for integer registers added
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llvm-svn: 41225
2007-08-21 16:09:25 +00:00
Bruno Cardoso Lopes
e2909db54c
Removed LowerRETURADDR, fixed small bug into LowerRET, LowerGlobalAddress
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fixed to generate instructions (add, lui) glued!
llvm-svn: 41158
2007-08-18 02:16:30 +00:00
Duncan Sands
e8bb2c6d32
Support for trampolines, except for X86 codegen which is
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still under discussion.
llvm-svn: 40549
2007-07-27 12:58:54 +00:00
Bruno Cardoso Lopes
be14b3c16c
Fixed AddLiveOut issues
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FI's created the write way to represent Mips stack
llvm-svn: 39760
2007-07-11 23:16:16 +00:00
Lauro Ramos Venancio
18fc770fd0
Assert when TLS is not implemented.
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llvm-svn: 39737
2007-07-11 17:19:51 +00:00
Bruno Cardoso Lopes
709699b8d3
Initial Mips support, here we go! =)
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- Modifications from the last patch included
(issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.
llvm-svn: 37461
2007-06-06 07:42:06 +00:00
