Evan Cheng
33df6a6bed
Revert 42908 for now.
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llvm-svn: 42960
2007-10-14 05:57:21 +00:00
Duncan Sands
bf31a19c62
Clarify that fastcc has a problem with nested function
...
trampolines, rather than with nested functions themselves.
llvm-svn: 42955
2007-10-13 07:38:37 +00:00
Evan Cheng
2e2d6358bc
Change unfoldMemoryOperand(). User is now responsible for passing in the
...
register used by the unfolded instructions. User can also specify whether to
unfold the load, the store, or both.
llvm-svn: 42946
2007-10-13 02:35:06 +00:00
Arnold Schwaighofer
50d2c33530
Correcting the corrections. Bad bad baaad emacs!
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llvm-svn: 42935
2007-10-12 21:53:12 +00:00
Arnold Schwaighofer
6bcd9e7ec2
Corrected many typing errors. And removed 'nest' parameter handling
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for fastcc from X86CallingConv.td. This means that nested functions
are not supported for calling convention 'fastcc'.
llvm-svn: 42934
2007-10-12 21:30:57 +00:00
Duncan Sands
d781ed9d21
Due to the new tail call optimization, trampolines can no
...
longer be created for fastcc functions.
llvm-svn: 42925
2007-10-12 19:37:31 +00:00
Evan Cheng
c36fdf163a
Update.
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llvm-svn: 42922
2007-10-12 18:22:55 +00:00
Dan Gohman
a75e4a62e6
Change the names used for internal labels to use the current
...
function symbol name instead of a codegen-assigned function
number.
Thanks Evan! :-)
llvm-svn: 42908
2007-10-12 14:53:36 +00:00
Dan Gohman
ad3e823efa
Mark vector ctpop, cttz, and ctlz as Expand on x86.
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llvm-svn: 42905
2007-10-12 14:09:42 +00:00
Evan Cheng
c7b7a3cb74
Fold load / store into MOV32to32_ and MOV16to16_.
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llvm-svn: 42895
2007-10-12 08:38:01 +00:00
Evan Cheng
f1ead16fd5
Flag MOV32to32_ with EXTRACT_SUBREG. They should not be scheduled apart.
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llvm-svn: 42894
2007-10-12 07:55:53 +00:00
Dan Gohman
edc841fb53
Set ISD::FPOW to Expand.
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llvm-svn: 42881
2007-10-11 23:21:31 +00:00
Dale Johannesen
9486be1cf2
Add missing argument to PALIGNR
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llvm-svn: 42874
2007-10-11 20:58:37 +00:00
Arnold Schwaighofer
d47210011e
Added tail call optimization to the x86 back end. It can be
...
enabled by passing -tailcallopt to llc. The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
elf/pic enabled + callee is in module + callee has
visibility protected or hidden
llvm-svn: 42870
2007-10-11 19:40:01 +00:00
Dan Gohman
6c3e0cdd36
LowerIntegerDivOrRem no longer exists.
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llvm-svn: 42787
2007-10-09 15:45:13 +00:00
Dan Gohman
cc317de0f5
Fix grammar in a comment.
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llvm-svn: 42786
2007-10-09 15:44:37 +00:00
Dan Gohman
9546d48e97
This is done.
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llvm-svn: 42785
2007-10-09 15:42:21 +00:00
Evan Cheng
c00dbfc5bc
Under 64-bit mode use LEA64_32r instead of LEA64r to save a byte.
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llvm-svn: 42783
2007-10-09 07:14:53 +00:00
Evan Cheng
90aa032f98
Bug fix. X86 was emitting redundant setcc and test instructions before a conditional move.
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llvm-svn: 42774
2007-10-08 22:16:29 +00:00
Dan Gohman
6df332f0cb
Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
...
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.
llvm-svn: 42762
2007-10-08 18:33:35 +00:00
Evan Cheng
090bfbebd1
Allow x86 compare to be commutable by default.
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llvm-svn: 42761
2007-10-08 18:27:46 +00:00
Chris Lattner
fcccf4b6c4
disable this entirely: it is causing use of invalidated iterators and infinite looping.
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llvm-svn: 42739
2007-10-07 22:00:31 +00:00
Chris Lattner
39dbb82db2
Fix many regressions on x86 by avoiding dereferencing the end iterator.
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llvm-svn: 42738
2007-10-07 21:53:12 +00:00
Anton Korobeynikov
54ecd77023
Oops, I really wanted to commit this part also :)
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llvm-svn: 42700
2007-10-06 16:39:43 +00:00
Anton Korobeynikov
34fefcf678
Move merge code into new helper function.
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llvm-svn: 42699
2007-10-06 16:17:49 +00:00
Evan Cheng
dc95020e30
Added DAG xforms. e.g.
...
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr)
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.
llvm-svn: 42677
2007-10-06 02:46:29 +00:00
Evan Cheng
9af50ee6ef
Commute x86 cmove instructions by swapping the operands and change the condition
...
to its inverse.
Testing this as llcbeta
llvm-svn: 42661
2007-10-05 23:13:21 +00:00
Evan Cheng
e0e36e4a0e
This is done.
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llvm-svn: 42656
2007-10-05 22:34:59 +00:00
Evan Cheng
dc467c6323
Enable convertToThreeAddress for X86 by default.
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llvm-svn: 42655
2007-10-05 22:31:10 +00:00
Evan Cheng
2b3122e56e
INC64_32r -> LEA64_32r is better than INC64_32r -> LEA32r, but it still can
...
cause performance degradation.
llvm-svn: 42653
2007-10-05 21:55:32 +00:00
Evan Cheng
688f34a273
In 64-bit mode, avoid using leal with 32-bit 32-bit address size, e.g.
...
leal 1(%ecx), %edi, which requires 67H prefix.
llvm-svn: 42647
2007-10-05 20:34:26 +00:00
Evan Cheng
b069dd6a25
Add support to convert more 64-bit instructions to 3-address instructions.
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llvm-svn: 42642
2007-10-05 18:20:36 +00:00
Evan Cheng
f658191412
ADC and SBB uses EFLAGS.
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llvm-svn: 42640
2007-10-05 17:59:57 +00:00
Dan Gohman
821635b63f
Change a few more spaces to tabs in assembly output.
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llvm-svn: 42638
2007-10-05 15:58:41 +00:00
Dan Gohman
950f96e456
Change a space to a tab in the assembly output of a .globl directive
...
for consistency.
llvm-svn: 42637
2007-10-05 15:54:58 +00:00
Evan Cheng
4e46ad06fe
Testing convertToThreeeAddress as X86 llcbeta.
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llvm-svn: 42630
2007-10-05 08:04:01 +00:00
Evan Cheng
6e5205d379
Added storeRegToAddr, loadRegFromAddr, and unfoldMemoryOperand's.
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llvm-svn: 42624
2007-10-05 01:34:55 +00:00
Evan Cheng
32766d3518
Not needed any more.
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llvm-svn: 42623
2007-10-05 01:34:14 +00:00
Chris Lattner
4224151a44
add a note.
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llvm-svn: 42607
2007-10-04 15:47:27 +00:00
Dan Gohman
30ba45b569
Use empty() member functions when that's what's being tested for instead
...
of comparing begin() and end().
llvm-svn: 42585
2007-10-03 19:26:29 +00:00
Chris Lattner
a31fa80185
add a note
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llvm-svn: 42579
2007-10-03 17:10:03 +00:00
Chris Lattner
dfcb750656
Bill's example is still not enough to repro this, but it has other issues that
...
seem significant as well.
llvm-svn: 42564
2007-10-03 03:40:24 +00:00
Bill Wendling
c5fbf331ff
Another micro-opt.
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llvm-svn: 42554
2007-10-02 21:49:31 +00:00
Bill Wendling
c4a53b617f
Another missed optimization with LICM.
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llvm-svn: 42552
2007-10-02 21:43:06 +00:00
Bill Wendling
36f033e53e
Small label changes.
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llvm-svn: 42549
2007-10-02 21:02:53 +00:00
Bill Wendling
a7d5c36215
Now with source code.
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llvm-svn: 42548
2007-10-02 21:01:16 +00:00
Bill Wendling
0159f0c5ba
Now with LL code!
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llvm-svn: 42547
2007-10-02 20:54:32 +00:00
Bill Wendling
48c27bf598
Another missed optimization.
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llvm-svn: 42546
2007-10-02 20:42:59 +00:00
Bill Wendling
5e50716a6b
Micro-optimization -- missed LICM opportunity.
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llvm-svn: 42542
2007-10-02 19:55:05 +00:00
Evan Cheng
3537dbbd1e
Refactor code to add load / store folded instructions -> register only
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instructions reverse map.
llvm-svn: 42509
2007-10-01 23:44:33 +00:00