Duncan Sands
10c1356bad
Remove some unused variables and methods warned about by
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icc (#177 , partial). Patch by Erick Tryzelaar.
llvm-svn: 81106
2009-09-06 08:33:48 +00:00
Owen Anderson
48f2f0ae72
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
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the latter is capable of representing either a primitive or an extended type.
llvm-svn: 78713
2009-08-11 20:47:22 +00:00
Owen Anderson
b4bce99769
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
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llvm-svn: 78610
2009-08-10 22:56:29 +00:00
Daniel Dunbar
95f6034ab6
Replace std::iostreams with raw_ostream in TableGen.
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- Sorry, I can't help myself.
- No intended functionality change.
llvm-svn: 74742
2009-07-03 00:10:29 +00:00
Dale Johannesen
16fd5641ad
TableGen for fast isel seems to assume an 'imm'
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operand is the last in a pattern. There is no
reason this should be true (although apparently
it always is right now).
llvm-svn: 72232
2009-05-21 22:25:49 +00:00
Evan Cheng
c971801ae1
Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead.
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llvm-svn: 62762
2009-01-22 09:10:11 +00:00
Dan Gohman
1bf4053aa8
Add support for having multiple predicates on a TreePatternNode.
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This will allow predicates to be composed, which will allow the
predicate definitions to become less redundant, and eventually
will allow DAGISelEmitter.cpp to emit less redundant code.
llvm-svn: 57562
2008-10-15 06:17:21 +00:00
Dan Gohman
19530c810d
Move the primary fast-isel top-level comments to FastISel.cpp, where
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they'll be a little more visible. Also, update and reword them a bit.
llvm-svn: 56877
2008-09-30 20:48:29 +00:00
Evan Cheng
f8d8287454
Correctly handle physical register inputs. They are not explicit input operands in the resulting machine instrs.
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llvm-svn: 55893
2008-09-08 08:39:33 +00:00
Evan Cheng
018d570cb8
Fix indentation of generated code.
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llvm-svn: 55876
2008-09-07 08:23:06 +00:00
Evan Cheng
4fb8cbebe4
Ignore multi-instruction patterns. e.g.
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def : Pat<(i8 (trunc GR32:$src)),
(i8 (EXTRACT_SUBREG (MOV32to32_ GR32:$src), x86_subreg_8bit))>
llvm-svn: 55875
2008-09-07 08:19:51 +00:00
Evan Cheng
43c7084625
Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class.
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llvm-svn: 55679
2008-09-03 00:03:49 +00:00
Owen Anderson
3aa3841da2
Add initial support for fast isel of instructions that have inputs pinned to physical registers.
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llvm-svn: 55545
2008-08-29 17:45:56 +00:00
Dan Gohman
c7b8401b77
Add a target callback for FastISel.
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llvm-svn: 55512
2008-08-28 23:21:34 +00:00
Owen Anderson
a5b87bf7e2
Add support for fast-isel of opcodes that require use of extract_subreg. Because of how extract_subreg is treated, it requires special case handling.
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llvm-svn: 55480
2008-08-28 18:06:12 +00:00
Dan Gohman
378f477a02
Update a comment to reflect recent changes.
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llvm-svn: 55418
2008-08-27 16:18:22 +00:00
Dan Gohman
5e5f1c9e8f
Basic FastISel support for floating-point constants.
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llvm-svn: 55401
2008-08-27 01:09:54 +00:00
Dan Gohman
84d7f86244
Refactor a bunch of FastISelEmitter code into a helper class, and
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put each major step in a separate function. This makes the high
level sequence of events easier to follow.
llvm-svn: 55385
2008-08-26 21:21:20 +00:00
Owen Anderson
9e2381b77d
We need to check that the return type is correct, even in cases where we don't
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have a return type that differs from the operand types.
llvm-svn: 55376
2008-08-26 18:50:00 +00:00
Owen Anderson
9c207563a1
Throw the switch to allow FastISel to emit instructions whose return types different from their inputs. Next step: adding lowering pattens in FastISel that actually use these newly available opcodes.
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llvm-svn: 55349
2008-08-26 01:22:59 +00:00
Owen Anderson
7e677167d6
Enhance TableGen to emit code for FastISel of opcodes with variadic return types without slowing down opcodes that are not variadic. No such opcodes are currently generated, but in theory it should be a matter of just hitting the switch.
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llvm-svn: 55347
2008-08-26 00:42:26 +00:00
Owen Anderson
9264f41ef2
Add a RetVT parameter to emitted FastISel methods, so that we will be able to pass the desired return
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type down. This is not currently used.
llvm-svn: 55345
2008-08-25 23:58:18 +00:00
Owen Anderson
19b73e58e8
Deepen the map structure tablegen uses to compute FastISel patterns, in preparation for having patterns
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with return types that differ from their input types. This is not yet used.
llvm-svn: 55344
2008-08-25 23:43:09 +00:00
Owen Anderson
27491bbf2c
Add support for fast isel of (integer) immediate materialization pattens, and use them to support
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bitcast of constants in fast isel.
llvm-svn: 55325
2008-08-25 20:20:32 +00:00
Dan Gohman
46c93eebcd
Add a few comments.
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llvm-svn: 55157
2008-08-22 00:28:15 +00:00
Dan Gohman
a398d11527
Factor out the predicate check code from DAGISelEmitter.cpp
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and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
llvm-svn: 55156
2008-08-22 00:20:26 +00:00
Dan Gohman
a6e647dd7c
Basic fast-isel support for instructions with constant int operands.
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llvm-svn: 55099
2008-08-21 01:41:07 +00:00
Dan Gohman
e628777073
Remove the code that limited FastISel to certain fixed signatures.
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llvm-svn: 55096
2008-08-21 00:35:26 +00:00
Dan Gohman
4ab3376173
Begin making more use of the FastISelEmitter class.
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llvm-svn: 55093
2008-08-21 00:19:05 +00:00
Dan Gohman
d79f723519
Remove an obsolete todo comment.
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llvm-svn: 55080
2008-08-20 21:47:28 +00:00
Dan Gohman
74bfad70e1
Factor the code for determining the target-specific instruction
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namespace out of the isel emitters and into common code.
llvm-svn: 55079
2008-08-20 21:45:57 +00:00
Dan Gohman
ddebe95287
Simplify FastISel's constructor argument list, make the FastISel
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class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.
llvm-svn: 55076
2008-08-20 21:05:57 +00:00
Dan Gohman
ebba5dd8be
For now, restrict FastISel to instructions that only involve one
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register class.
llvm-svn: 55008
2008-08-19 20:58:14 +00:00
Dan Gohman
69eb9fb38e
Factor out the code to scan an instruction's operands into a
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helper function.
llvm-svn: 55007
2008-08-19 20:56:30 +00:00
Dan Gohman
85448ceb8d
Add more comments.
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llvm-svn: 55004
2008-08-19 20:36:33 +00:00
Dan Gohman
b60099089a
Fix indentation in FastISel tablegen-emitted code.
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llvm-svn: 55003
2008-08-19 20:31:38 +00:00
Dan Gohman
a8dfd17e4e
Add more checking to filter out more kinds of things that
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FastISel doesn't support yet.
llvm-svn: 55002
2008-08-19 20:30:54 +00:00
Dan Gohman
1701d4ef7e
80 columns.
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llvm-svn: 54998
2008-08-19 18:07:49 +00:00
Dan Gohman
3a57ef9668
Add a few doxygen comments.
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llvm-svn: 54997
2008-08-19 18:06:12 +00:00
Dan Gohman
4b1b033f89
Initial checkin of the new "fast" instruction selection support. See
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the comments in FastISelEmitter.cpp for details on what this is.
This is currently experimental and unusable.
llvm-svn: 54751
2008-08-13 20:19:35 +00:00