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Commit Graph

206761 Commits

Author SHA1 Message Date
Nico Weber
351cccb545 [gn build] more hotfix after 17df195f70 to unbreak llvm-config tests 2020-11-13 10:03:05 -05:00
Paul C. Anagnostopoulos
82f80b36cd [TableGen] Enhance the six comparison bang operators.
Update the Programmer's Reference.

Differential Revision: https://reviews.llvm.org/D91036
2020-11-13 09:57:27 -05:00
serge-sans-paille
f115c30ea5 llvmbuildectomy - remove conflict file 2020-11-13 15:56:05 +01:00
Nico Weber
5a29fda5e7 [gn build] Port 8bb6347939b 2020-11-13 09:55:24 -05:00
serge-sans-paille
4616e3954c llvmbuildectomy - support disabled native target 2020-11-13 15:50:13 +01:00
Nico Weber
bc1485d26a [gn build] (manually) merge 1d0676b54c4e3 2020-11-13 09:41:19 -05:00
Nico Weber
843410425e [gn build] Hotfix to unbreak build after 9218ff50f9308 2020-11-13 09:26:43 -05:00
Piotr Sobczak
b363f67c95 [DivergenceAnalysis] Use addRequiredTransitive
For querying divergence the chained analysis passes are required
to be alive, for instance LoopInfoWrapperPass.

Ensure that by using addRequiredTransitive.

Differential Revision: https://reviews.llvm.org/D91335
2020-11-13 14:40:00 +01:00
serge-sans-paille
ae7304bdea llvmbuildectomy - compatibility with ocaml bindings
Use exact component name in add_ocaml_library.
Make expand_topologically compatible with new architecture.
Fix quoting in is_llvm_target_library.
Fix LLVMipo component name.
Write release note.
2020-11-13 14:35:52 +01:00
Florian Hahn
041da6277f Add !annotation metadata and remarks pass.
This patch adds a new !annotation metadata kind which can be used to
attach annotation strings to instructions.

It also adds a new pass that emits summary remarks per function with the
counts for each annotation kind.

The intended uses cases for this new metadata is annotating
'interesting' instructions and the remarks should provide additional
insight into transformations applied to a program.

To motivate this, consider these specific questions we would like to get answered:

* How many stores added for automatic variable initialization remain after optimizations? Where are they?
* How many runtime checks inserted by a frontend could be eliminated? Where are the ones that did not get eliminated?

Discussed on llvm-dev as part of 'RFC: Combining Annotation Metadata and Remarks'
(http://lists.llvm.org/pipermail/llvm-dev/2020-November/146393.html)

Reviewed By: thegameg, jdoerfert

Differential Revision: https://reviews.llvm.org/D91188
2020-11-13 13:24:10 +00:00
Hans Wennborg
5404bc49f5 Revert "[AsmPrinter] fix -disable-debug-info option"
The test fails on Mac, see comment on the code review.

> This option was in a rather convoluted place, causing global parameters
> to be set in awkward and undesirable ways to try to account for it
> indirectly. Add tests for the -disable-debug-info option and ensure we
> don't print unintended markers from unintended places.
>
> Reviewed By: dstenb
>
> Differential Revision: https://reviews.llvm.org/D91083

This reverts commit 9606ef03f03904cec213db031b5ea6fd6052dc5d.
2020-11-13 13:46:13 +01:00
Jan Svoboda
506cd0f5d7 Reland [clang][cli] Port ObjCMTAction to new option parsing system
Merge existing marhsalling info kinds and add some primitives to
express flag options that contribute to a bitfield.

Depends on D82574

Original patch by Daniel Grumberg.

Reviewed By: Bigcheese

Differential Revision: https://reviews.llvm.org/D82860
2020-11-13 13:42:54 +01:00
Simon Atanasyan
7f523a31e8 [MC][mips] Remove unused check prefixes. NFC 2020-11-13 14:31:13 +03:00
Simon Atanasyan
f7aab6bccf [mips] Add tests to check disassembling of add.ps/mul.ps/sub.ps instructions 2020-11-13 14:31:12 +03:00
Yvan Roux
61b6c3664a [UpdateTestChecks] Fix $ in function test for ARM.
Removes AArch64 target checking inside 32bit ARM test to bring back
buildbots to a green state.  But $ are not well handled for ARM and it
still need to be fixed.
2020-11-13 12:26:56 +01:00
Kerry McLaughlin
c26a89a1b4 [SVE][CodeGen] Improve codegen of scalable masked scatters
If the scatter store is able to perform the sign/zero extend of
its index, this is folded into the instruction with refineIndexType().
Additionally, refineUniformBase() will return the base pointer and index
from an add + splat_vector.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D90942
2020-11-13 11:19:36 +00:00
Max Kazantsev
69f353da9d [NFC] Move code between functions as a preparation step for further improvement 2020-11-13 18:12:45 +07:00
Simon Pilgrim
fe58ed0a0d [ValueTracking] computeKnownBitsFromShiftOperator use KnownBits direct for constant shift amounts.
Let KnownBits shift handlers deal with out-of-range shift amounts.
2020-11-13 10:54:35 +00:00
Max Kazantsev
cc07518ff3 [NFC] Refactor lambda into static function 2020-11-13 17:42:23 +07:00
Simon Pilgrim
16ce8e35dd Fix MSVC signed/unsigned comparison warning. NFCI. 2020-11-13 10:20:48 +00:00
Kazushi (Jam) Marukawa
c5d772e8d0 [VE] Add vst intrinsic instructions
Add vst intrinsic instructions and a regression test.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91406
2020-11-13 19:11:57 +09:00
Max Kazantsev
74132baa0c [NFC] Move lambdae into static functions 2020-11-13 17:07:25 +07:00
Florian Hahn
744ac7e74e [docs] Fix undefined reference in ORCv2 design doc.
This fixes a typo introduced in 984e87923f1096c815cef900cda0926c68286ddf
which caused the docs build to fail.
2020-11-13 09:44:48 +00:00
Jay Foad
a68bf7cb45 [AMDGPU] One more use of the new export target names. NFC. 2020-11-13 09:44:09 +00:00
serge-sans-paille
82b6e6053d llvmbuildectomy - replace llvm-build by plain cmake
No longer rely on an external tool to build the llvm component layout.

Instead, leverage the existing `add_llvm_componentlibrary` cmake function and
introduce `add_llvm_component_group` to accurately describe component behavior.

These function store extra properties in the created targets. These properties
are processed once all components are defined to resolve library dependencies
and produce the header expected by llvm-config.

Differential Revision: https://reviews.llvm.org/D90848
2020-11-13 10:35:24 +01:00
serge-sans-paille
65ee119111 [nfc] Fix missing include 2020-11-13 10:35:23 +01:00
Lang Hames
09080e305f [ORC][examples] Fix missing includes/dependencies in more examples. 2020-11-13 20:22:01 +11:00
Lang Hames
cc7c32ac3a [ORC] Make a narrowing conversion explicit. 2020-11-13 20:11:19 +11:00
Max Kazantsev
aa03b5d94b [Test] One more IndVars test with inverted exit condition 2020-11-13 16:02:31 +07:00
Max Kazantsev
f7d73f2bcb [IndVars] Fix branches exiting by true with invariant conditions
Forgot to invert the condition for them.
2020-11-13 15:52:00 +07:00
Max Kazantsev
62642393c5 [Test] Add test with inverted branch 2020-11-13 15:51:59 +07:00
Lang Hames
5491158fed [examples] Fix Kaleidoscope examples after OrcJIT break-up / remote TPC commit.
Fix the Kaleidoscope examples after 1d0676b54c4 by explicitly creating the
SymbolStringPool.
2020-11-13 19:13:00 +11:00
Kai Luo
782c68b542 [PowerPC] Add test case for negated abs. NFC. 2020-11-13 08:06:31 +00:00
Max Kazantsev
e52022b096 [NFC] Refactor loop-invariant getters to return Optional 2020-11-13 15:03:10 +07:00
Lang Hames
61a5db908b [examples] Fix Kaleidoscope examples after OrcJIT break-up / remote TPC commit.
Fix the Kaleidoscope examples after 1d0676b54c4 by explicitly creating the
SymbolStringPool.
2020-11-13 18:43:13 +11:00
Lang Hames
0830411749 [ORC][examples] Fix include and library dependence for SpeculativeJIT example. 2020-11-13 18:24:34 +11:00
Lang Hames
5f751300a8 [ORC] Add dependence of OrcJIT on OrcTargetProcess.
The SelfTargetProcessControl class depends on OrcTargetProcess.
2020-11-13 18:09:41 +11:00
Arthur Eubanks
80be457407 [NFC] Removed unused variable
Obsolete as of https://reviews.llvm.org/D91046.
2020-11-12 22:24:57 -08:00
Akira Hatanaka
66709a337d [ObjC][ARC] Clear the lists of basic blocks and instructions before
continuing the loop

This fixes a bug introduced in c6f1713c46e61bbb8ece9ac5ac329d02e7f93228.
2020-11-12 22:20:02 -08:00
Lang Hames
bf08525938 [ORC] Make WrapperFunctionResult::zeroInit static 2020-11-13 17:15:13 +11:00
Lang Hames
67dd2f03a9 [ORC] Remove designated initializer. 2020-11-13 17:12:33 +11:00
Lang Hames
7103f74446 [ORC] Break up OrcJIT library, add Orc-RPC based remote TargetProcessControl
implementation.

This patch aims to improve support for out-of-process JITing using OrcV2. It
introduces two new class templates, OrcRPCTargetProcessControlBase and
OrcRPCTPCServer, which together implement the TargetProcessControl API by
forwarding operations to an execution process via an Orc-RPC Endpoint. These
utilities are used to implement out-of-process JITing from llvm-jitlink to
a new llvm-jitlink-executor tool.

This patch also breaks the OrcJIT library into three parts:
  -- OrcTargetProcess: Contains code needed by the JIT execution process.
  -- OrcShared: Contains code needed by the JIT execution and compiler
     processes
  -- OrcJIT: Everything else.

This break-up allows JIT executor processes to link against OrcTargetProcess
and OrcShared only, without having to link in all of OrcJIT. Clients executing
JIT'd code in-process should start linking against OrcTargetProcess as well as
OrcJIT.

In the near future these changes will enable:
  -- Removal of the OrcRemoteTargetClient/OrcRemoteTargetServer class templates
     which provided similar functionality in OrcV1.
  -- Restoration of Chapter 5 of the Building-A-JIT tutorial series, which will
     serve as a simple usage example for these APIs.
  -- Implementation of lazy, cross-target compilation in lli's -jit-kind=orc-lazy
     mode.
2020-11-13 17:05:13 +11:00
Jameson Nash
be6333792e [AsmPrinter] fix -disable-debug-info option
This option was in a rather convoluted place, causing global parameters
to be set in awkward and undesirable ways to try to account for it
indirectly. Add tests for the -disable-debug-info option and ensure we
don't print unintended markers from unintended places.

Reviewed By: dstenb

Differential Revision: https://reviews.llvm.org/D91083
2020-11-13 00:58:09 -05:00
Craig Topper
c2ee7a175e [X86] Use EVT::getIntegerVT instead of MVT::getIntegerVT where the type can be i2 or i4.
This was a mistake introduced in D91294. I'm not sure how to
exercise this with the existing code, but I hit it while trying
some follow up experiments.
2020-11-12 21:48:45 -08:00
Craig Topper
da8115ff1d [X86] When storing v1i1/v2i1/v4i1 to memory, make sure we store zeros in the rest of the byte
We can't store garbage in the unused bits. It possible that something like zextload from i1/i2/i4 is created to read the memory. Those zextloads would be legalized assuming the extra bits are 0.

I'm not sure that the code in lowerStore is executed for the v1i1/v2i1/v4i1 case. It looks like the DAG combine in combineStore may have converted them to v8i1 first. And I think we're missing some cases to avoid going to the stack in the first place. But I don't have time to investigate those things at the moment so I wanted to focus on the correctness issue.

Should fix PR48147.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D91294
2020-11-12 21:28:18 -08:00
Max Kazantsev
e31ac8ae3f [IndVars] Replace checks with invariants if we cannot remove them
If we cannot prove that the check is trivially true, but can prove that it either
fails on the 1st iteration or never fails, we can replace it with first iteration check.

Differential Revision: https://reviews.llvm.org/D88527
Reviewed By: skatkov
2020-11-13 12:23:12 +07:00
Philip Reames
39ff0675e5 [Tests][LoopVect] Exercise basic uniform memory operand logic 2020-11-12 20:34:31 -08:00
Sanjay Patel
b6044b4d1a [InstCombine] fold sub of low-bit masked value from offset of same value
There might be some demanded/known bits way to generalize this,
but I'm not seeing it right now.

This came up as a regression when I was looking at a different
demanded bits improvement.

https://rise4fun.com/Alive/5fl

  Name: general
  Pre: ((-1 << countTrailingZeros(C1)) & C2) == 0
  %a1 = add i8 %x, C1
  %a2 = and i8 %x, C2
  %r = sub i8 %a1, %a2
  =>
  %r = and i8 %a1, ~C2

  Name: test 1
  %a1 = add i8 %x, 192
  %a2 = and i8 %x, 10
  %r = sub i8 %a1, %a2
  =>
  %r = and i8 %a1, -11

  Name: test 2
  %a1 = add i8 %x, -108
  %a2 = and i8 %x, 3
  %r = sub i8 %a1, %a2
  =>
  %r = and i8 %a1, -4
2020-11-12 20:10:28 -05:00
Sanjay Patel
4247cea23b [InstCombine] add tests for sub with masked bits; NFC 2020-11-12 20:10:28 -05:00
Stanislav Mekhanoshin
4dbdbbe753 [AMDGPU] Remove scratch rsrc from spill pseudos
Differential Revision: https://reviews.llvm.org/D91110
2020-11-12 15:23:37 -08:00