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72 Commits

Author SHA1 Message Date
Nate Begeman
4278967588 Support returning non-power-of-2 vectors to unblock some work 
llvm-svn: 44371
 2007-11-27 19:28:48 +00:00
Evan Cheng
7d8deec92f Much improved pic jumptable codegen: 
Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

llvm-svn: 43924
 2007-11-09 01:32:10 +00:00
Evan Cheng
781ed42681 Didn't mean to check these in. 
llvm-svn: 43923
 2007-11-09 01:28:33 +00:00
Evan Cheng
7e1d8b99ab Bug fix. Passive nodes are not in SUnitMap. 
llvm-svn: 43922
 2007-11-09 01:27:11 +00:00
Rafael Espindola
ec025c3042 Move the LowerMEMCPY and LowerMEMCPYCall to a common place. 
Thanks for the suggestions Bill :-)

llvm-svn: 43742
 2007-11-05 23:12:20 +00:00
Dale Johannesen
1f70f86c7a Make labels work in asm blocks; allow labels as 
parameters.  Rename ValueRefList to ParamList
in AsmParser, since its only use is for parameters.

llvm-svn: 43734
 2007-11-05 21:20:28 +00:00
Dan Gohman
f8ab690988 Add runtime library names for pow. 
llvm-svn: 42880
 2007-10-11 23:09:10 +00:00
Dan Gohman
6df332f0cb Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to 
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.

llvm-svn: 42762
 2007-10-08 18:33:35 +00:00
Dale Johannesen
c7b51b678d First round of ppc long double. call/return and 
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.

llvm-svn: 42644
 2007-10-05 20:04:43 +00:00
Dale Johannesen
e61886cee4 Add sqrt and powi intrinsics for long double. 
llvm-svn: 42423
 2007-09-28 01:08:20 +00:00
Dan Gohman
8385890394 Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and 
the check to see if the assembler supports .loc from X86TargetLowering
into the superclass TargetLowering.

llvm-svn: 42297
 2007-09-25 15:10:49 +00:00
Chris Lattner
eed3e42816 initialize SetCCResultContents, fixing PR1693 
llvm-svn: 42193
 2007-09-21 17:06:39 +00:00
Dale Johannesen
04682bdc81 More long double fixes. x86_64 should build now. 
llvm-svn: 42155
 2007-09-19 23:55:34 +00:00
Owen Anderson
4b71e55287 Add lengthof and endof templates that hide a lot of sizeof computations. 
Patch by Sterling Stein!

llvm-svn: 41758
 2007-09-07 04:06:50 +00:00
Chris Lattner
1e089aac3a rename isOperandValidForConstraint to LowerAsmOperandForConstraint, 
changing the interface to allow for future changes.

llvm-svn: 41384
 2007-08-25 00:47:38 +00:00
Dale Johannesen
79551baaad long double 9 of N. This finishes up the X86-32 bits 
(constants are still not handled).  Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).

llvm-svn: 40958
 2007-08-09 01:04:01 +00:00
Dan Gohman
be352027e6 Initialize the IndexedModeActions array with memset before 
updating it with calls to setIndexedLoadAction/setIndexedStoreAction,
which only update a few bits at a time. This avoids ostensible
undefined behavior of operationg on values which may be
trap-representations, and as a practical matter fixes errors from
valgrind, which doesn't track uninitialized memory with bit
granularity.

llvm-svn: 38468
 2007-07-09 20:49:44 +00:00
Dan Gohman
c6bdcfa8c0 Add new TargetLowering code to provide the final register type that an 
illegal value type will be transformed to, for code that needs the
register type after all transformations instead of just after the first
transformation.

Factor out the code that uses this information to do copy-from-regs and
copy-to-regs for various purposes into separate functions so that they
are done consistently.

llvm-svn: 37781
 2007-06-28 23:29:44 +00:00
Dan Gohman
354f02e03d Generalize MVT::ValueType and associated functions to be able to represent 
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.

This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.

llvm-svn: 37719
 2007-06-25 16:23:39 +00:00
Dan Gohman
a62327ea40 Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from 
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.

llvm-svn: 37704
 2007-06-22 14:59:07 +00:00
Dan Gohman
72af1305fb Tidy up ValueType names in comments. 
llvm-svn: 37688
 2007-06-21 14:48:26 +00:00
Dan Gohman
1815e9bdb3 Rename TargetLowering::getNumElements and friends to 
TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number of elements for vector types.

llvm-svn: 37687
 2007-06-21 14:42:22 +00:00
Chris Lattner
14bcacb40b Fix CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll, and PR1473. 
llvm-svn: 37362
 2007-05-30 16:30:06 +00:00
Chris Lattner
27b469b945 same patch as the previous one, but the symmetric case 
llvm-svn: 37249
 2007-05-19 00:46:51 +00:00
Chris Lattner
2430b7c4aa Disable the (A == (B-A)) -> 2*A == B xform when the sub has multiple uses (in 
this case, the xform introduces an extra operation).  This compiles
PowerPC/compare-duplicate.ll into:

_test:
        subf r2, r3, r4
        cmplw cr0, r2, r3
        bne cr0, LBB1_2 ;F

instead of:

_test:
        slwi r2, r3, 1
        subf r3, r3, r4
        cmplw cr0, r4, r2
        bne cr0, LBB1_2 ;F

This is target independent of course.

llvm-svn: 37246
 2007-05-19 00:43:44 +00:00
Dan Gohman
d6a33914fb Qualify several calls to functions in the MVT namespace, for consistency. 
llvm-svn: 37230
 2007-05-18 17:52:13 +00:00
Chris Lattner
910abfbfd1 disable MaskedValueIsZero, ComputeMaskedBits, and SimplifyDemandedBits for 
i128 integers.  The 64-bit masks are not wide enough to represent the results.
These should be converted to APInt someday.

llvm-svn: 37169
 2007-05-17 18:19:23 +00:00
Evan Cheng
3163b77d5e Add target hook to specify block size limit for if-conversion. 
llvm-svn: 37134
 2007-05-16 23:45:53 +00:00
Chris Lattner
e95894e9f9 Allow i/s to match (gv+c). This fixes CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll 
and PR1382

llvm-svn: 36672
 2007-05-03 16:54:34 +00:00
Chris Lattner
639f807048 fix a pasto 
llvm-svn: 36242
 2007-04-18 03:01:40 +00:00
Chris Lattner
1677782ef0 Fix a bug in my previous patch, grabbing the shift amount width from the 
wrong operand.

llvm-svn: 36223
 2007-04-17 22:53:02 +00:00
Chris Lattner
b55496c660 Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used. 
This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
        srwi r2, r3, 1
        extsh r3, r2
        blr

on PPC, instead of:
_baz:
        slwi r2, r3, 8
        srwi r2, r2, 9
        extsh r3, r2
        blr

GCC produces:
_baz:
        srwi r10,r4,24
        insrwi r10,r3,24,0
        srawi r9,r3,24
        srawi r3,r10,9
        extsh r3,r3
        blr

This implements CodeGen/PowerPC/shl_elim.ll

llvm-svn: 36221
 2007-04-17 21:14:16 +00:00
Anton Korobeynikov
f3e62a428a Removed tabs everywhere except autogenerated & external files. Add make 
target for tabs checking.

llvm-svn: 36146
 2007-04-16 18:10:23 +00:00
Chris Lattner
2f221a83ec Fix weirdness handling single element vectors. 
llvm-svn: 35941
 2007-04-12 04:44:28 +00:00
Chris Lattner
461f7ed33b remove dead target hooks. 
llvm-svn: 35847
 2007-04-09 23:34:08 +00:00
Chris Lattner
ae6e2c0ee5 remove some dead target hooks, subsumed by isLegalAddressingMode 
llvm-svn: 35840
 2007-04-09 22:27:04 +00:00
Chris Lattner
8747705792 switch TL::getValueType to use MVT::getValueType. 
llvm-svn: 35527
 2007-03-31 04:05:24 +00:00
Chris Lattner
143464e05f add one addressing mode description hook to rule them all. 
llvm-svn: 35520
 2007-03-30 23:14:50 +00:00
Evan Cheng
a55449c051 Remove isLegalAddressImmediate. 
llvm-svn: 35406
 2007-03-28 01:53:55 +00:00
Chris Lattner
4a7feb72f5 implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll 
llvm-svn: 35327
 2007-03-25 04:35:41 +00:00
Chris Lattner
91adfbe0ff Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll 
llvm-svn: 35324
 2007-03-25 02:18:14 +00:00
Chris Lattner
b19069959d switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.

llvm-svn: 35322
 2007-03-25 02:14:49 +00:00
Dale Johannesen
44c0a5d545 repair x86 performance, dejagnu problems from previous change 
llvm-svn: 35245
 2007-03-21 21:51:52 +00:00
Dale Johannesen
3e422e3b49 do not share old induction variables when this would result in invalid 
instructions (that would have to be split later)

llvm-svn: 35227
 2007-03-20 21:54:54 +00:00
Evan Cheng
ce8b779c6c Added isLegalAddressExpression hook to test if the given expression can be 
folded into target addressing mode for the given type.

llvm-svn: 35121
 2007-03-16 08:42:32 +00:00
Evan Cheng
b2a5499d86 More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
llvm-svn: 35076
 2007-03-12 23:37:10 +00:00
Chris Lattner
b9f2992e38 initialize a instance variable 
llvm-svn: 34567
 2007-02-25 01:28:05 +00:00
Chris Lattner
6faf9e8e97 Fix CodeGen/Generic/2007-02-23-DAGCombine-Miscompile.ll and PR1219 
llvm-svn: 34551
 2007-02-24 02:09:29 +00:00
Jim Laskey
f29366635a Need to init. 
llvm-svn: 34499
 2007-02-22 18:04:49 +00:00
Chris Lattner
871a3e6c91 Implement i/n/s constraints correctly. This fixes 
test/CodeGen/PowerPC/2007-02-16-InlineAsmNConstraint.ll

llvm-svn: 34368
 2007-02-17 06:00:35 +00:00