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4 Commits

Author SHA1 Message Date
Matt Arsenault
5f7f2a06d7 AMDGPU: Set SubRegIndex size and offset 
I'm not sure what reasons the comment here could have
had for not setting these. Without these set, there is
an assertion hit during DWARF emission.

llvm-svn: 243661
 2015-07-30 17:03:11 +00:00
Tom Stellard
3f1708598e R600 -> AMDGPU rename 
llvm-svn: 239657
 2015-06-13 03:28:10 +00:00
Tom Stellard
39f7e52397 Revert "AMDGPU: Add core backend files for R600/SI codegen v6" 
This reverts commit 4ea70107c5e51230e9e60f0bf58a0f74aa4885ea.

llvm-svn: 160303
 2012-07-16 18:19:53 +00:00
Tom Stellard
9f326179fc AMDGPU: Add core backend files for R600/SI codegen v6 
llvm-svn: 160270
 2012-07-16 14:17:08 +00:00