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49992 Commits

Author SHA1 Message Date
Bill Wendling
2400aacfb7 Perform the lowering only if there are invokes. 
llvm-svn: 140719
 2011-09-28 20:29:45 +00:00
Bill Wendling
37088b0660 Ahem...actually *add* the ARMSjLjLowering pass to the pass manager. 
llvm-svn: 140718
 2011-09-28 20:29:28 +00:00
Justin Holewinski
f88506ac8d PTX: Fix alignment logic 
llvm-svn: 140709
 2011-09-28 18:24:58 +00:00
Akira Hatanaka
0510b9d75b Rename predicate In32BitMode to NotFP64bit and add definition of IsFP64bit. 
llvm-svn: 140705
 2011-09-28 18:11:19 +00:00
Akira Hatanaka
fa83d9ff16 Remove definitions of branch-on-FP-likely instructions. They are deprecated. 
llvm-svn: 140704
 2011-09-28 17:56:55 +00:00
Akira Hatanaka
2d08a7fd85 Mips64 predicate definitions. Patch by Liu. 
llvm-svn: 140703
 2011-09-28 17:50:27 +00:00
Andrew Trick
50915b5136 indvars: generalize SCEV getPreStartForSignExtend. 
Handle general Add expressions to avoid leaving around redundant
32-bit IVs.

llvm-svn: 140701
 2011-09-28 17:02:54 +00:00
Justin Holewinski
a68272b38f PTX: MC-ize the PTX backend (patch 2 of N) 
Get rid of some of the no-longer-needed parts of PTXAsmPrinter.

llvm-svn: 140698
 2011-09-28 14:32:06 +00:00
Justin Holewinski
2f96de340f PTX: MC-ize the PTX back-end (patch 1 of N) 
Lay some groundwork for converting to MC-based asm printer. This is the first
of probably many patches to bring the back-end back up-to-date with all of the
recent MC changes.

llvm-svn: 140697
 2011-09-28 14:32:04 +00:00
James Molloy
c4fcff419c Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit. 
Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.

Add decoder and disassembler tests.

Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.

llvm-svn: 140696
 2011-09-28 14:21:38 +00:00
Duncan Sands
638a8b94be A typeid of zero means a cleanup, not a catch. This case occurs 
when there is both a catch and a cleanup.  Correct the comment.

llvm-svn: 140686
 2011-09-28 09:13:02 +00:00
Benjamin Kramer
418d47fb38 PTX: Simplify code. No functionality change. 
llvm-svn: 140680
 2011-09-28 04:32:36 +00:00
Benjamin Kramer
e48bcfc038 PTX: Pass param name strings per const reference. 
The copies caused use-after-free bugs on std::string implementations without COW (i.e. anything but libstdc++)

llvm-svn: 140679
 2011-09-28 04:08:02 +00:00
Bill Wendling
8732528888 Strip off pointer casts when looking at the eh.sjlj.functioncontext's argument. 
llvm-svn: 140678
 2011-09-28 03:52:41 +00:00
Bill Wendling
7df5ebd83c Bitcast the alloca to an i8* to match the intrinsic's signature. 
llvm-svn: 140677
 2011-09-28 03:47:11 +00:00
Bill Wendling
b3656866e2 Create and use an llvm.eh.sjlj.functioncontext intrinsic. 
This intrinsic is used to pass the index of the function context to the back-end
for further processing. The back-end is in charge of filling in the rest of the
entries.

llvm-svn: 140676
 2011-09-28 03:36:43 +00:00
Bill Wendling
086133b8fd In the new EH model, setup the function context and the call site info. 
The DWARF exception pass uses the call site information, which is set up here. A
pre-RA pass is too late for it to use this information. So create and setup the
function context here, and then insert the call site values here (and map the
call sites for the DWARF EH pass). This is simpler than the original pass, and
doesn't make the CFG lose its SSA-ness.

It's a win-win-win-win-lose-win-win situation.

llvm-svn: 140675
 2011-09-28 03:14:05 +00:00
Bill Wendling
d420e5929d Don't conditionalize execution of the SjLj EH prepare pass. 
We may need an SjLj EH preparation pass for some call site information, at least
in the short term.

llvm-svn: 140674
 2011-09-28 03:07:34 +00:00
Andrew Trick
97b40d3aff indvars should hoist [sz]ext because licm is not rerun. 
llvm-svn: 140670
 2011-09-28 01:35:36 +00:00
Eli Friedman
f4f4a75d2b PR10628: Fix getModRefInfo so it queries the underlying alias() implementation correctly while checking nocapture calls. 
llvm-svn: 140666
 2011-09-28 00:34:27 +00:00
Jakob Stoklund Olesen
f55c7de5f4 Rename class and clean up source. 
No functional change intended.

llvm-svn: 140664
 2011-09-28 00:01:56 +00:00
Jakob Stoklund Olesen
bbe41f6be8 Rename SSEDomainFix -> lib/CodeGen/ExecutionDepsFix. 
I'll clean up the source in the next commit.

llvm-svn: 140663
 2011-09-28 00:01:54 +00:00
Akira Hatanaka
ea4d87c3e8 Remove MipsFPRound. Mips1 is no longer supported. 
llvm-svn: 140661
 2011-09-27 23:55:37 +00:00
Jakob Stoklund Olesen
2bf243f464 Remove X86-dependent stuff from SSEDomainFix. 
This also enables domain swizzling for AVX code which required a few
trivial test changes.

The pass will be moved to lib/CodeGen shortly.

llvm-svn: 140659
 2011-09-27 23:50:46 +00:00
Ted Kremenek
d233d7b066 Unbreak CMake build. 
llvm-svn: 140655
 2011-09-27 23:29:59 +00:00
Jakob Stoklund Olesen
2fc08f4eeb Implement TII::get/setExecutionDomain() for ARM. 
llvm-svn: 140653
 2011-09-27 22:57:21 +00:00
Jakob Stoklund Olesen
b843221bf0 Promote the X86 Get/SetSSEDomain functions to TargetInstrInfo. 
I am going to unify the SSEDomainFix and NEONMoveFix passes into a
single target independent pass.  They are essentially doing the same
thing.

llvm-svn: 140652
 2011-09-27 22:57:18 +00:00
Jim Grosbach
b503a2183e ARM Thumb2 asm parsing [SU]XT[BH] without rotate but with .w. 
Add inst alias to handle these assembly forms. Add tests, too.

rdar://10178799

llvm-svn: 140647
 2011-09-27 22:18:54 +00:00
Bill Wendling
c63b31e1ec This is the start of the new SjLj EH preparation pass, which will replace the 
current IR-level pass.

The old SjLj EH pass has some problems, especially with the new EH model. Most
significantly, it violates some of the new restrictions the new model has. For
instance, the 'dispatch' table wants to jump to the landing pad, but we cannot
allow that because only an invoke's unwind edge can jump to a landing pad. This
requires us to mangle the code something awful. In addition, we need to keep the
now dead landingpad instructions around instead of CSE'ing them because the
DWARF emitter uses that information (they are dead because no control flow edge
will execute them - the control flow edge from an invoke's unwind is superceded
by the edge coming from the dispatch).

Basically, this pass belongs not at the IR level where SSA is king, but at the
code-gen level, where we have more flexibility.

llvm-svn: 140646
 2011-09-27 22:14:12 +00:00
Akira Hatanaka
d44d75eccf Embed patterns in definitions of MFC1 and MTC1 instead of defining them outside 
of the instruction definitions using Pat<>.

llvm-svn: 140644
 2011-09-27 22:01:01 +00:00
Cameron Zwarich
2b292f90da Remove an invalid assert that is really just asserting when the scheduler emits 
a suboptimal schedule.

llvm-svn: 140643
 2011-09-27 21:59:16 +00:00
Jim Grosbach
e883e939a3 Rename AddSelectionDAGCSEId() to addSelectionDAGCSEId(). 
Naming conventions consistency. No functional change.

llvm-svn: 140636
 2011-09-27 20:59:33 +00:00
Benjamin Kramer
355b353595 Stop emitting instructions with the name "tmp" they eat up memory and have to be uniqued, without any benefit. 
If someone prefers %tmp42 to %42, run instnamer.

llvm-svn: 140634
 2011-09-27 20:39:19 +00:00
Chad Rosier
e9cf87d911 These symbols appear to be visible by SearchForAddressOfSymbol and no longer 
require special case handling.
rdar://10117377

llvm-svn: 140629
 2011-09-27 20:01:41 +00:00
Michael J. Spencer
82f9fa9d9a Object: Add archive support. 
llvm-svn: 140626
 2011-09-27 19:36:55 +00:00
Duncan Sands
9a75d80f2c Check that catch clauses have pointer type. 
llvm-svn: 140625
 2011-09-27 19:34:22 +00:00
Justin Holewinski
c74cdce7e0 PTX: Fix case where printed alignment could be 0 
llvm-svn: 140624
 2011-09-27 19:25:49 +00:00
Justin Holewinski
d7f59a21a7 PTX: Use external symbols to keep track of params and locals. This also fixes 
a couple of outstanding issues with frame objects occuring as instruction
operands.

llvm-svn: 140616
 2011-09-27 18:12:55 +00:00
Jakob Stoklund Olesen
08b5751146 Use existing function. 
llvm-svn: 140615
 2011-09-27 17:55:08 +00:00
Akira Hatanaka
33908261c2 Fix function MipsRegisterInfo::getRegisterNumbering. 
Return numbers of 64-bit registers.

llvm-svn: 140609
 2011-09-27 17:15:27 +00:00
Akira Hatanaka
c27a7b0463 Do not add the pass that restores $gp if target is Mips64. 
llvm-svn: 140607
 2011-09-27 16:58:43 +00:00
Duncan Sands
1695ec539b Have the verifier check that all landingpad operands are constants. 
llvm-svn: 140606
 2011-09-27 16:43:19 +00:00
Nadav Rotem
5b6d21503b Cleanup PromoteIntOp_EXTRACT_VECTOR_ELT and PromoteIntRes_SETCC. 
Add a new method: getAnyExtOrTrunc and use it to replace the manual check.

llvm-svn: 140603
 2011-09-27 11:16:47 +00:00
Nadav Rotem
1d08f41853 Revert r140463; The patch assumes that <4 x i1> is saved to memory as 4 x i8, 
while the decision is to bit-pack small values.

llvm-svn: 140601
 2011-09-27 10:48:29 +00:00
Akira Hatanaka
7259090c76 Mark MipsPseudo isPseudo. 
llvm-svn: 140598
 2011-09-27 04:57:54 +00:00
Justin Holewinski
a50e29abd6 PTX: Add support for sitofp in backend 
llvm-svn: 140593
 2011-09-27 01:04:47 +00:00
Bill Wendling
589336d854 Split the landing pad basic block with the correct function. Also merge the 
split landingpad instructions into a PHI node.
PR11016

llvm-svn: 140592
 2011-09-27 00:59:31 +00:00
Andrew Trick
eb2bea7d4a Disable LSR retry by default. 
Disabling aggressive LSR saves compilation time, and with the new
indvars behavior usually improves performance.

llvm-svn: 140590
 2011-09-27 00:44:14 +00:00
Andrew Trick
9a82406730 LSR, one of the new Cost::isLoser() checks did not get merged in the previous checkin. 
llvm-svn: 140583
 2011-09-26 23:35:25 +00:00
Owen Anderson
79c9401e0e Remove extraneous commit garbage. 
llvm-svn: 140581
 2011-09-26 23:14:02 +00:00