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Commit Graph

82459 Commits

Author SHA1 Message Date
Stepan Dyatkovskiy
eb65d844be Recommited reworked r156804:
SelectionDAGBuilder::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced.

llvm-svn: 157046
2012-05-18 08:32:28 +00:00
Craig Topper
45a709baab Simplify code a bit. No functional change intended.
llvm-svn: 157044
2012-05-18 07:07:36 +00:00
Craig Topper
d86e4c0088 Simplify handling of v16i8 shuffles and fix a missed optimization.
llvm-svn: 157043
2012-05-18 06:42:06 +00:00
Evan Cheng
6ffd037105 Teach two-address pass to update the "source" map so it doesn't perform a
non-profitable commute using outdated info. The test case would still fail
because of poor pre-RA schedule. That will be fixed by MI scheduler.

rdar://11472010

llvm-svn: 157038
2012-05-18 01:33:51 +00:00
Danil Malyshev
0d982140e7 Temporarily disabled the MCJIT tests for Darwin, because the RuntimeDyldMachO has a problems with relocations for 32bit x86.
llvm-svn: 157035
2012-05-18 00:30:58 +00:00
Eric Christopher
77eb6dc0fd Clarify comment.
llvm-svn: 157033
2012-05-18 00:16:22 +00:00
Nuno Lopes
cd83a81786 fix corner case in ConstantRange::intersectWith().
this fixes the missed optimization I was seeing in the CorrelatedValuePropagation pass

llvm-svn: 157032
2012-05-18 00:14:36 +00:00
Kevin Enderby
ef39671f98 Fixed a bug in llvm-objdump when disassembling using -macho option for a binary
containing no symbols.  Fixed the crash and fixed it not disassembling anything.

llvm-svn: 157031
2012-05-18 00:13:56 +00:00
Jakob Stoklund Olesen
f6cadaaf06 Remove a test that was only testing for physreg joining.
This is the same as the other tests: Clever tricks are required to make
the arguments and return value line up in a single-instruction function.
It rarely happens in real life.

We have plenty other examples of this behavior.

llvm-svn: 157030
2012-05-18 00:07:14 +00:00
Jakob Stoklund Olesen
b3487aa334 Remove -join-physregs from the test suite.
This option has been disabled for a while, and it is going away so I can
clean up the coalescer code.

The tests that required physreg joining to be enabled were almost all of
the form "tiny function with interference between arguments and return
value". Such functions are usually inlined in the real world.

The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly
rare.

llvm-svn: 157027
2012-05-17 23:44:19 +00:00
Nuno Lopes
2b752029f2 minor simplification in the call to ConstantRange constructor
llvm-svn: 157024
2012-05-17 23:04:08 +00:00
Andrew Trick
b57d7deff8 comments
llvm-svn: 157020
2012-05-17 22:37:09 +00:00
Kevin Enderby
9747fd81e3 Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missing
the 0b10 mask encoding bits.  Make MSR APSR writes without a _<bits> qualifier
an alias for MSR APSR_nzcvq even though ARM as deprecated it use.  Also add
support for suffixes (_nzcvq, _g, _nzcvqg) for APSR versions.  Some FIXMEs in
the code for better error checking when versions shouldn't be used.
rdar://11457025

llvm-svn: 157019
2012-05-17 22:18:01 +00:00
Danil Malyshev
dade6759c4 - Added ExecutionEngine/MCJIT tests
- Added HOST_ARCH to Makefile.config.in
The HOST_ARCH will be used by MCJIT tests filter, because MCJIT supported only x86 and ARM architectures now.

llvm-svn: 157015
2012-05-17 21:07:47 +00:00
Bill Wendling
fea7e4fc70 Remove extraneous ';'.
llvm-svn: 157011
2012-05-17 20:27:58 +00:00
Andrew Trick
de303d5be0 misched: trace ReadyQ.
llvm-svn: 157007
2012-05-17 18:35:13 +00:00
Andrew Trick
865d5c0a6d misched: Added 3-level regpressure back-off.
Introduce the basic strategy for register pressure scheduling.

1) Respect target limits at all times.

2) Indentify critical register classes (pressure sets).
   Track pressure within the scheduled region.
   Avoid increasing scheduled pressure for critical registers.

3) Avoid exceeding the max pressure of the region prior to scheduling.

Added logic for picking between the top and bottom ready Q's based on
regpressure heuristics.

Status: functional but needs to be asjusted to achieve good results.
llvm-svn: 157006
2012-05-17 18:35:10 +00:00
Andrew Trick
8494212e03 comment
llvm-svn: 157005
2012-05-17 18:35:07 +00:00
Andrew Trick
7c81798f81 regpressure: Fix getMaxUpwardPressureDelta.
llvm-svn: 157004
2012-05-17 18:35:05 +00:00
Andrew Trick
9f0a58d92b misched: fix liveness iterators
llvm-svn: 157003
2012-05-17 18:35:03 +00:00
Andrew Trick
adad394842 whitespace
llvm-svn: 157002
2012-05-17 18:35:00 +00:00
Jakob Stoklund Olesen
8a0b0df10a Never clear <undef> flags on already joined copies.
RegisterCoalescer set <undef> flags on all operands of copy instructions
that are scheduled to be removed. This is so they won't affect
shrinkToUses() by introducing false register reads.

Make sure those <undef> flags are never cleared, or shrinkToUses() could
cause live intervals to end at instructions about to be deleted.

This would be a lot simpler if RegisterCoalescer could just erase joined
copies immediately instead of keeping all the to-be-deleted instructions
around.

This fixes PR12862. Unfortunately, bugpoint can't create a sane test
case for this. Like many other coalescer problems, this failure depends
of a very fragile series of events.

<rdar://problem/11474428>

llvm-svn: 157001
2012-05-17 18:32:42 +00:00
Jakob Stoklund Olesen
0069dd0862 Fix a verifier bug.
Make sure useless (def-only) intervals also get verified.

llvm-svn: 157000
2012-05-17 18:32:40 +00:00
Bill Wendling
ab2fc29c78 Relax the requirement that the exception object must be an instruction. During
bugpoint-ing, it may turn into something else.

llvm-svn: 156998
2012-05-17 17:59:51 +00:00
Evandro Menezes
740dea501d [Hexagon] Clean up Hexagon ELF definition.
llvm-svn: 156996
2012-05-17 16:46:46 +00:00
Chris Lattner
3d3d2be19b enhance the intrinsic info stuff to emit encodings that don't fit in 32-bits into a
separate side table, using the handy SequenceToOffsetTable class.  This encodes all
these weird things into another 256 bytes, allowing all intrinsics to be encoded this way.

llvm-svn: 156995
2012-05-17 15:55:41 +00:00
Tim Northover
fc7737e7dc Remove incorrect pattern for ARM SMML instruction.
Patch by Meador Inge.

llvm-svn: 156989
2012-05-17 13:12:13 +00:00
Manuel Klimek
74eaba6d7b Fix compile error.
llvm-svn: 156986
2012-05-17 09:32:05 +00:00
Stepan Dyatkovskiy
5fd076f3e6 SelectionDAGBuilder: CaseBlock, CaseRanges and CaseCmp changed representation of Low and High from signed to unsigned. Since unsigned ints usually simpler, faster and allows to reduce some extra signed bit checks needed before <,>,<=,>= comparisons.
llvm-svn: 156985
2012-05-17 08:56:30 +00:00
Chris Lattner
cd2c5863d5 Genericize the intrinsics descriptor decoding a bit to make room
for future expansion, no functionality change yet though.

llvm-svn: 156979
2012-05-17 05:13:57 +00:00
Chris Lattner
288872000a finish encoding all of the interesting details of intrinsics. Now intrinsics
are only rejected because they can't be encoded into a 32-bit unit, not because
they contain an unencodable feature.

llvm-svn: 156978
2012-05-17 05:03:24 +00:00
Chris Lattner
8962c547fa strengthen the intrinsic descriptor stuff to be able to handle sin, cos and other
intrinsics that use passed-in arguments.

llvm-svn: 156977
2012-05-17 04:30:58 +00:00
Chris Lattner
c951b8da61 simplify code generated by tblgen that is not necessary since we dropped
compatibility with LLVM 2.x bitcode files.

llvm-svn: 156976
2012-05-17 04:07:48 +00:00
Francois Pichet
8d9b4be771 I forgot the #ifdef _MSC_VER guard in my last commit.
llvm-svn: 156975
2012-05-17 04:00:03 +00:00
Francois Pichet
e46a849da6 Fix the MSVC 2010 build: disable the optimizer for a problematic function.
llvm-svn: 156973
2012-05-17 03:38:19 +00:00
Jakob Stoklund Olesen
a912a25126 Use RegUnits to compute overlapping registers.
TableGen already computes register units as the basic unit of
interference. We can use that to compute the set of overlapping
registers.

This means that we can easily compute overlap sets for one register at a
time. There is no benefit to computing all registers at once.

llvm-svn: 156960
2012-05-16 23:03:04 +00:00
Akira Hatanaka
8d41be902b This patch adds the register class for MIPS16 as well as the ability for
llc to recognize MIPS16 as a MIPS ASE extension. -mips16 will mean the
mips16 ASE for mips32 by default.

As part of fixing of adding this we discovered some small changes that
need to be made to MipsInstrInfo::storeRegToStackSLot and
MipsInstrInfo::loadRegFromStackSlot. We were using some "==" equality tests
where in fact we should have been using Mips::<regclas>.hasSubClassEQ instead,
per suggestion of Jakob Stoklund Olesen.

Patch by Reed Kotler.

llvm-svn: 156958
2012-05-16 22:19:56 +00:00
Eric Christopher
4c15973dff Grammar.
llvm-svn: 156955
2012-05-16 22:08:58 +00:00
Jakob Stoklund Olesen
92778c5641 Set sub-register <undef> flags more accurately.
When widening an existing <def,reads-undef> operand to a super-register,
it may be necessary to clear the <undef> flag because the wider register
is now read-modify-write through the instruction.

Conversely, it may be necessary to add an <undef> flag when the
coalescer turns a full-register def into a sub-register def, but the
larger register wasn't live before the instruction.

This happens in test/CodeGen/ARM/coalesce-subregs.ll, but the test
is too small for the <undef> flags to affect the generated code.

llvm-svn: 156951
2012-05-16 21:22:35 +00:00
Simon Atanasyan
8bc0051492 Disable JITTest.FunctionIsRecompiledAndRelinked and JITTest.NoStubs
on MIPS where they are not implemented.

llvm-svn: 156935
2012-05-16 19:07:55 +00:00
Danil Malyshev
6fbce86b24 Added LLIMCJITMemoryManager to the lli. This manager will be used for MCJIT instead of DefaultJIMMemoryManager.
It's more flexible for MCJIT tasks, in addition it's provides a invalidation instruction cache for code sections which will be used before JIT code will be executed.

llvm-svn: 156933
2012-05-16 18:50:11 +00:00
Benjamin Kramer
630c0ab180 Hexagon: Remove unused command line option.
llvm-svn: 156917
2012-05-16 15:03:55 +00:00
Duncan Sands
cd6958362b I noticed that named metadata doesn't provide a direct way of getting at the
named metadata list, unlike all the other global objects (global variables,
functions, aliases), so add that for consistency.

llvm-svn: 156915
2012-05-16 12:25:43 +00:00
Chandler Carruth
6bc19df503 Teach the 'opt' tool about '-Os' and '-Oz', corresponding to the Clang
options, to enable easier testing of the innards of LLVM that are
enabled by such optimization strategies.

Note that this doesn't provide the (much needed) function attribute
support for -Oz (as opposed to -Os), but still seems like a positive
step to better test the logic that Clang currently relies on.

Patch by Patrik Hägglund.

llvm-svn: 156913
2012-05-16 08:32:49 +00:00
Duncan Sands
00ff48d3e3 Fix a thinko in DisintegrateMERGE_VALUES. Patch by Xiaoyi Guo.
llvm-svn: 156909
2012-05-16 07:57:18 +00:00
Chris Lattner
294ca0bfbc Significantly reduce the compiled size of Functions.cpp by turning a big blob of tblgen
generated code (for Intrinsic::getType) into a table.  This handles common cases right now,
but I plan to extend it to handle all cases and merge in type verification logic as well
in follow-on patches.

llvm-svn: 156905
2012-05-16 06:34:44 +00:00
Chris Lattner
346025b7c0 have tblgen emit cast<> instead of dyn_cast<> when we know it must succeed.
llvm-svn: 156902
2012-05-16 04:51:09 +00:00
Evan Cheng
9a33fc17be Avoid creating a cycle when folding load / op with flag / store. PR11451474. rdar://11451474
llvm-svn: 156896
2012-05-16 01:54:27 +00:00
John Criswell
f5812a8109 Fixed grammar for the llvm.trap intrinsic description.
llvm-svn: 156881
2012-05-16 00:26:51 +00:00
Jakob Stoklund Olesen
1da786c936 Enable sub-sub-register copy coalescing.
It is now possible to coalesce weird skewed sub-register copies by
picking a super-register class larger than both original registers. The
included test case produces code like this:

  vld2.32 {d16, d17, d18, d19}, [r0]!
  vst2.32 {d18, d19, d20, d21}, [r0]

We still perform interference checking as if it were a normal full copy
join, so this is still quite conservative. In particular, the f1 and f2
functions in the included test case still have remaining copies because
of false interference.

llvm-svn: 156878
2012-05-15 23:31:35 +00:00