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5480 Commits

Author SHA1 Message Date
Evan Cheng
2da9d803a4 Added X86FunctionInfo subclass of MachineFunction to record whether the 
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.

llvm-svn: 28703
 2006-06-06 23:30:24 +00:00
Chris Lattner
3dbb345389 Now that PR633 is implemented, the CBE can know to emit _setjmp/_longjmp 
when available.  This speeds up hexxagon from 18.61s to 16.61s with the CBE on
PPC Mac OS (for reference, LLC is 15.48s and GCC is 23.35s).

llvm-svn: 28697
 2006-06-06 21:45:47 +00:00
Chris Lattner
bfbee64ecf Add PowerPC intrinsics to support dcbz[l] 
llvm-svn: 28696
 2006-06-06 21:29:23 +00:00
Rafael Espindola
42375303a6 add R0 to liveout 
expand "ret null" (implements test/Regression/CodeGen/ARM/ret_void.ll)
note that a Flag link is missing between the copy and the branch

llvm-svn: 28691
 2006-06-05 22:26:14 +00:00
Evan Cheng
8d9b7650f1 A few new entries. 
llvm-svn: 28683
 2006-06-04 09:08:00 +00:00
Evan Cheng
6fd191494f Be consistent with gcc. 
llvm-svn: 28682
 2006-06-04 07:24:07 +00:00
Andrew Lenharth
813c3dcf58 ignore ordered/unordered for now 
llvm-svn: 28679
 2006-06-04 00:25:51 +00:00
Evan Cheng
696779cea0 Cygwin support. Patch by Anton Korobeynikov! 
llvm-svn: 28672
 2006-06-02 22:38:37 +00:00
Evan Cheng
ddb0525a32 Use xor to clear a register. 
llvm-svn: 28667
 2006-06-02 21:20:34 +00:00
Evan Cheng
ed96100b00 Incorrect AT&T opcode. 
llvm-svn: 28666
 2006-06-02 21:09:10 +00:00
Chris Lattner
d14d882c4a Add mingw support, patch contributed by Anton 
llvm-svn: 28661
 2006-06-02 18:54:01 +00:00
Chris Lattner
1d2618c6c7 Silence -pedantic warning 
llvm-svn: 28633
 2006-06-01 17:17:06 +00:00
Chris Lattner
ac3d91f023 Silence -pedantic warning. 
llvm-svn: 28630
 2006-06-01 17:13:10 +00:00
Evan Cheng
4966cad9b5 Typos 
llvm-svn: 28617
 2006-06-01 05:53:27 +00:00
Reid Spencer
4b26f88ec9 For PR786: 
Don't warn about -pedantic errors. Add a note to the PR instead.

llvm-svn: 28616
 2006-06-01 05:49:51 +00:00
Reid Spencer
cf025eb201 For PR786: 
Turn -pedantic and -Wno-long-long compile flags on by default. In a few
places, avoid the warnings by removing these options in the local makefile.
One notable exception: lib/Target/CBackend/Writer.cpp. These warnings are
left on as a reminder to developers to clean them up.

llvm-svn: 28614
 2006-06-01 01:55:21 +00:00
Reid Spencer
94a443bb29 Use archive libraries instead of object files for VMCore, BCReader, 
BCWriter, and bzip2 libraries. Adjust the various makefiles to accommodate
these changes. This was done to speed up link times.

llvm-svn: 28610
 2006-06-01 01:30:27 +00:00
Evan Cheng
15c1f84762 Remove a warning 
llvm-svn: 28607
 2006-06-01 00:30:39 +00:00
Evan Cheng
4488266c46 Rename ASM modifier trunc8, trunc16 to subreg8, subreg16. 
llvm-svn: 28606
 2006-05-31 22:34:26 +00:00
Reid Spencer
30d5eade2a Fix casting so there's no warning on Alpha. 
llvm-svn: 28605
 2006-05-31 22:26:11 +00:00
Evan Cheng
f90443c471 Sign extender 
llvm-svn: 28603
 2006-05-31 22:05:11 +00:00
Evan Cheng
889544823a Rename instructions for consistency sake. 
llvm-svn: 28594
 2006-05-31 19:00:07 +00:00
Evan Cheng
abbbe57ba2 Select vector_shuffle v1, undef <2, 3, ?, ?> to MOVHLPS. 
llvm-svn: 28582
 2006-05-31 00:51:37 +00:00
Evan Cheng
82db95cd32 Remove dead code. 
llvm-svn: 28581
 2006-05-31 00:50:42 +00:00
Evan Cheng
8dc7251083 A new entry 
llvm-svn: 28579
 2006-05-30 23:56:31 +00:00
Evan Cheng
c024ad7f32 MAXP{D|S} and MINP{D|S} are commutable. 
llvm-svn: 28578
 2006-05-30 23:47:30 +00:00
Evan Cheng
e2397256c1 Commute shufps / shufpd. 
llvm-svn: 28577
 2006-05-30 23:34:30 +00:00
Evan Cheng
88bd79b75b Somehow I lost a condition when I was shuffling some code around. Anyway, 
only transform a shufps to pshufd when the first two operands are the same.

llvm-svn: 28575
 2006-05-30 22:13:36 +00:00
Evan Cheng
bdb6af8e7d Fix a build breaker. 
llvm-svn: 28574
 2006-05-30 21:45:53 +00:00
Evan Cheng
66bfb1dc9a Oops. PSHUFD is only available with SSE2. 
llvm-svn: 28573
 2006-05-30 21:30:59 +00:00
Chris Lattner
a5c50baaf5 Add a note 
llvm-svn: 28572
 2006-05-30 21:29:15 +00:00
Chris Lattner
31b150e334 Always reserve space for 8 spilled GPRs. GCC apparently assumes that this 
space will be available, even if the callee isn't varargs.

llvm-svn: 28571
 2006-05-30 21:21:04 +00:00
Evan Cheng
03ca651244 Allow shufps x, x, mask to be converted to pshufd x, mask to save a move. 
llvm-svn: 28565
 2006-05-30 20:26:50 +00:00
Evan Cheng
d7e0bab7f0 Remove bogus comment. 
llvm-svn: 28564
 2006-05-30 20:24:48 +00:00
Rafael Espindola
1bf57da16e Expand ret into "CopyToReg;BRIND" 
llvm-svn: 28559
 2006-05-30 17:33:19 +00:00
Evan Cheng
ced05ab1b4 Add a note about integer multiplication by constants. 
llvm-svn: 28551
 2006-05-30 07:37:37 +00:00
Evan Cheng
f7637e403f A addressing mode folding enhancement: 
Fold c2 in (x << c1) | c2 where (c2 < c1)
e.g.
int test(int x) {
  return (x << 3) + 7;
}

This can be codegen'd as:
leal 7(,%eax,8), %eax

llvm-svn: 28550
 2006-05-30 06:59:36 +00:00
Evan Cheng
1891844780 Some new entries about truncate / anyext 
llvm-svn: 28548
 2006-05-30 06:23:50 +00:00
Chris Lattner
e1552475d3 Ignore generated files 
llvm-svn: 28520
 2006-05-27 01:23:30 +00:00
Evan Cheng
de0f25081a Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...

llvm-svn: 28510
 2006-05-26 23:10:12 +00:00
Evan Cheng
25db1a52d2 Vector argument must be passed in memory location aligned on 16-byte boundary. 
llvm-svn: 28505
 2006-05-26 20:37:47 +00:00
Evan Cheng
7f468901bb Mac OS X ABI document lied. The first four XMM registers are used to pass 
vector arguments, not three.

llvm-svn: 28504
 2006-05-26 19:22:06 +00:00
Evan Cheng
629df0afb2 Minor update to make the code more clear 
llvm-svn: 28499
 2006-05-26 18:39:59 +00:00
Evan Cheng
bde90b2732 Update more comments. 
llvm-svn: 28498
 2006-05-26 18:37:16 +00:00
Evan Cheng
414c909954 Fix some comments. 
llvm-svn: 28497
 2006-05-26 18:25:43 +00:00
Evan Cheng
a4b6f4749d No need to handle illegal types. 
llvm-svn: 28496
 2006-05-26 18:22:49 +00:00
Rafael Espindola
f7c5af4863 On ARM, alignment is in bits 
Add lr as a hard coded operand of bx

llvm-svn: 28494
 2006-05-26 10:56:17 +00:00
Evan Cheng
c80154a36e Remove a couple of bogus casts. 
llvm-svn: 28493
 2006-05-26 08:04:31 +00:00
Evan Cheng
77b8eaf292 Minor bug caught by Ashwin Chandra 
llvm-svn: 28491
 2006-05-26 06:22:34 +00:00
Evan Cheng
f610c3e318 Consistency 
llvm-svn: 28488
 2006-05-25 23:31:23 +00:00