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63 Commits

Author SHA1 Message Date
Justin Holewinski
715c9b53b3 PTX: Fix predicate logic bug 
Code such as:

%vreg100 = setcc %vreg10, -1, SETNE
brcond %vreg10, %tgt

was being incorrectly morphed into

%vreg100 = and %vreg10, 1
brcond %vreg10, %tgt

where the 'and' instruction could be eliminated since
such logic is on 1-bit types in the PTX back-end, leaving
us with just:

brcond %vreg10, %tgt

which essentially gives us inverted branch conditions.

llvm-svn: 153364
 2012-03-24 01:23:20 +00:00
Jia Liu
b077b6085d Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
llvm-svn: 150878
 2012-02-18 12:03:15 +00:00
Justin Holewinski
c9457b712c PTX: Continue to fix up the register mess. 
llvm-svn: 145947
 2011-12-06 17:39:48 +00:00
Dan Bailey
6c29989135 add rules in tabgen for PTX COPY_ADDRESS of frameindex 
llvm-svn: 144387
 2011-11-11 14:45:06 +00:00
Justin Holewinski
361b3c9ff2 PTX: Fix disabling of MAD instruction selection 
llvm-svn: 142352
 2011-10-18 13:39:20 +00:00
Justin Holewinski
19679dac62 PTX: Implement signed division 
llvm-svn: 141306
 2011-10-06 20:00:33 +00:00
Justin Holewinski
2a5786383a PTX: Add programmable rounding mode specifier for int <-> fp conversion instrs. 
Also take this opportunity to clean up the rounding mode pass.

llvm-svn: 140854
 2011-09-30 13:46:52 +00:00
Justin Holewinski
f86bf451e4 PTX: Attempt to cleanup/unify the handling of FP rounding modes. This requires 
us to manually provide Pat<> definitions for all FP instruction patterns.

llvm-svn: 140849
 2011-09-30 12:54:43 +00:00
Justin Holewinski
4966d44b44 PTX: Add new patterns for bitconvert and any_extend 
llvm-svn: 140753
 2011-09-29 01:13:12 +00:00
Justin Holewinski
a50e29abd6 PTX: Add support for sitofp in backend 
llvm-svn: 140593
 2011-09-27 01:04:47 +00:00
Justin Holewinski
3e9a0bfed0 PTX: Implement ISD::ANY_EXTEND 
llvm-svn: 140548
 2011-09-26 18:57:24 +00:00
Justin Holewinski
848dd4cf7c PTX: Split up the TableGen instruction definitions into logical units 
llvm-svn: 140534
 2011-09-26 16:20:31 +00:00
Justin Holewinski
83ae9143fd PTX: Unify handling of loads/stores 
llvm-svn: 140533
 2011-09-26 16:20:28 +00:00
Justin Holewinski
e79db83e87 PTX: Handle FrameIndex nodes 
llvm-svn: 140532
 2011-09-26 16:20:25 +00:00
Justin Holewinski
0ae669e25c PTX: Fix another 80-column violation 
llvm-svn: 140387
 2011-09-23 16:50:35 +00:00
Justin Holewinski
6d69389691 [PATCH 2/2] PTXInstrInfo.td PTXIntrinsicInstrInfo.td 80 columns 
From 5936c03172e251f12a0332d1033de5718e6e2091 Mon Sep 17 00:00:00 2001
---
 lib/Target/PTX/PTXInstrInfo.td          |  165 ++++++++++++++++++++----------
 lib/Target/PTX/PTXIntrinsicInstrInfo.td |   88 +++++++++++------
 2 files changed, 167 insertions(+), 86 deletions(-)

llvm-svn: 140376
 2011-09-23 14:18:24 +00:00
Justin Holewinski
6353459757 PTX: Generalize handling of .param types 
llvm-svn: 140375
 2011-09-23 14:18:22 +00:00
Justin Holewinski
04f4046d9f PTX: Use .param space for device function return values on SM 2.0+, and attempt 
to fix up parameter passing on SM < 2.0

llvm-svn: 140309
 2011-09-22 16:45:46 +00:00
Justin Holewinski
021ab783b7 PTX: Add initial support for device function calls 
- Calls are supported on SM 2.0+ for function with no return values

llvm-svn: 137125
 2011-08-09 17:36:31 +00:00
Dan Bailey
5b68fc5126 PTX: Reverting implementation of i8. 
The .b8 operations in PTX are far more limiting than I first thought. The mov operation isn't even supported, so there's no way of converting a .pred value into a .b8 without going via .b16, which is
not sensible. An improved implementation needs to use the fact that loads and stores automatically extend and truncate to implement support for EXTLOAD and TRUNCSTORE in order to correctly support
boolean values.

llvm-svn: 133873
 2011-06-25 18:16:28 +00:00
Dan Bailey
2237ea06fb PTX: Add support for i8 type and introduce associated .b8 registers 
The i8 type is required for boolean values, but can only use ld, st and mov instructions. The i1 type continues to be used for predicates.

llvm-svn: 133814
 2011-06-24 19:27:10 +00:00
Justin Holewinski
5e20d4dbfc PTX: Re-work target sm/compute selection and add some basic GPU 
targets: g80, gt200, gf100(fermi)

llvm-svn: 133799
 2011-06-24 16:27:49 +00:00
Justin Holewinski
67c23366fd PTX: Prevent DCE from eliminating st.param calls, and unify the handling of 
st.param and ld.param

FIXME: Test cases still need to be updated
llvm-svn: 133733
 2011-06-23 18:10:05 +00:00
Justin Holewinski
bdf03838a5 PTX: Use .param space for parameters in device functions for SM >= 2.0 
FIXME: DCE is eliminating the final st.param.x calls, figure out why
llvm-svn: 133732
 2011-06-23 18:10:03 +00:00
Justin Holewinski
376f1d46d4 PTX: Add signed integer comparisons 
llvm-svn: 133599
 2011-06-22 02:09:50 +00:00
Justin Holewinski
e62da847fa PTX: Fix conversion between predicates and value types 
llvm-svn: 133454
 2011-06-20 18:42:48 +00:00
Justin Holewinski
a5d3db3bd2 PTX: Add basic register spilling code 
The current implementation generates stack loads/stores, which are
really just mov instructions from/to "special" registers.  This may
not be the most efficient implementation, compared to an approach where
the stack registers are directly folded into instructions, but this is
easier to implement and I have yet to see a case where ptxas is unable
to see through this kind of register usage and know what is really
going on.

llvm-svn: 133443
 2011-06-20 15:56:20 +00:00
Justin Holewinski
c515f1b903 PTX: Adjust rounding modes 
* rounding modes for fp add, mul, sub now use .rn
* float -> int rounding correctly uses .rzi not .rni
* 32bit fdiv for sm13 uses div.rn (instead of div.approx)
* 32bit fdiv for sm10 now uses div (instead of div.approx)

Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit.

All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend.

Patch by Dan Bailey

llvm-svn: 133253
 2011-06-17 12:12:42 +00:00
Justin Holewinski
a8d46115ce PTX: Rename register classes for readability and combine int and fp registers 
llvm-svn: 133171
 2011-06-16 17:49:58 +00:00
Justin Holewinski
eb209f0916 PTX: add flag to disable mad/fma selection 
Patch by Dan Bailey

llvm-svn: 131537
 2011-05-18 15:42:23 +00:00
Justin Holewinski
ecdabf3295 PTX: add PTX 2.3 setting in PTX sub-target. 
Patch by Wei-Ren Chen

llvm-svn: 131123
 2011-05-10 12:32:11 +00:00
Justin Holewinski
a042c76db5 PTX: support for select 
- selection of SELP instruction
- new selp.ll test

Patch by Dan Bailey

llvm-svn: 130357
 2011-04-28 00:19:55 +00:00
Justin Holewinski
c1013e6801 PTX: mov fix and rounding correction for cvt 
- fix typo in MOV
- correct fp rounding on CVT
- new cvt.ll test

Patch by Dan Bailey

llvm-svn: 130356
 2011-04-28 00:19:54 +00:00
Justin Holewinski
405d24712b PTX: support for fneg 
- selection of FNEG instruction
- new fneg.ll test

Patch by Dan Bailey

llvm-svn: 130355
 2011-04-28 00:19:53 +00:00
Justin Holewinski
bde9352742 PTX: support for bitwise operations on predicates 
- selection of bitwise preds (AND, OR, XOR)
- new bitwise.ll test

Patch by Dan Bailey

llvm-svn: 130353
 2011-04-28 00:19:51 +00:00
Justin Holewinski
dc1965a16c PTX: Add intrinsics to list of built-in intrinsics, which allows them to be 
used by Clang.  To help Clang integration, the PTX target has been split
     into two targets: ptx32 and ptx64, depending on the desired pointer size.

- Add GCCBuiltin class to all intrinsics
- Split PTX target into ptx32 and ptx64

llvm-svn: 129851
 2011-04-20 15:37:17 +00:00
Che-Liang Chiou
a1aa7de4a9 ptx: add integer div and rem instruction 
Patched by Dan Bailey

llvm-svn: 129848
 2011-04-20 09:28:55 +00:00
Che-Liang Chiou
1792164516 ptx: add floating-point comparison to setp 
Patched by Dan Bailey

llvm-svn: 129847
 2011-04-20 09:28:20 +00:00
Che-Liang Chiou
c4a22b7cd5 ptx: support setp's 4-operand format 
llvm-svn: 128767
 2011-04-02 08:51:39 +00:00
Che-Liang Chiou
a4ae414c30 ptx: clean up branch code a bit 
llvm-svn: 128405
 2011-03-28 10:23:13 +00:00
Justin Holewinski
8861d34661 PTX: Improve support for 64-bit addressing 
- Fix bug in ADDRrr/ADDRri/ADDRii selection for 64-bit addresses
- Add comparison selection for i64
- Add zext selection for i32 -> i64
- Add shl/shr/sha support for i64

llvm-svn: 128153
 2011-03-23 16:58:51 +00:00
Che-Liang Chiou
7c5fc3a68f ptx: add analyze/insert/remove branch 
llvm-svn: 128084
 2011-03-22 14:12:00 +00:00
Justin Holewinski
d9c382441b PTX: Fix various codegen issues 
- Emit mad instead of mad.rn for shader model 1.0
- Emit explicit mov.u32 instructions for reading global variables
- (most PTX instructions cannot take global variable immediates)

llvm-svn: 127895
 2011-03-18 19:24:28 +00:00
Che-Liang Chiou
f4a2c17cf5 ptx: add unconditional and conditional branch 
llvm-svn: 127873
 2011-03-18 11:08:52 +00:00
Justin Holewinski
8948485aa7 PTX: Set PTX 2.0 as the minimum supported version 
- Remove PTX 1.4 code generation
- Change type of intrinsics to .v4.i32 instead of .v4.i16
- Add and/or/xor integer instructions

llvm-svn: 127677
 2011-03-15 13:24:15 +00:00
Justin Holewinski
995d10cfea PTX: Add support for sqrt/sin/cos intrinsics 
llvm-svn: 127578
 2011-03-14 14:09:33 +00:00
Che-Liang Chiou
6ff0aa8ab3 ptx: add set.p instruction and related changes to predicate execution 
llvm-svn: 127577
 2011-03-14 11:26:01 +00:00
Justin Holewinski
a26d2f782e PTX: Add preliminary support for floating-point divide and multiply-and-add 
llvm-svn: 127410
 2011-03-10 16:57:18 +00:00
Che-Liang Chiou
15aba09539 ptx: add basic intrinsic support 
llvm-svn: 127084
 2011-03-05 14:17:37 +00:00
Che-Liang Chiou
3529b49230 Add 64-bit addressing to PTX backend 
- Add '64bit' sub-target option.
- Select 32-bit/64-bit loads/stores based on '64bit' option.
- Fix function parameter order.

Patch by Justin Holewinski

llvm-svn: 126837
 2011-03-02 07:36:48 +00:00