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33 Commits

Author SHA1 Message Date
Dan Gohman
42b2f38113 Teach LowerSubregs to preserve kill/dead information when lowering 
subreg instructions.

llvm-svn: 61220
 2008-12-18 22:14:08 +00:00
Dan Gohman
ca2ab1f2c8 Make LowerSubregs' debug output for EXTRACT_SUBREG consistent with 
that of INSERT_SUBREG and SUBREG_TO_REG.

llvm-svn: 61218
 2008-12-18 22:11:34 +00:00
Dan Gohman
7000e62d3a Fix a copy+pasto in an assertion message. 
llvm-svn: 61217
 2008-12-18 22:07:25 +00:00
Dan Gohman
34e47d552b Fix indentation level. 
llvm-svn: 61216
 2008-12-18 22:06:01 +00:00
Devang Patel
a2ccbea45a Silence unused variable warnings. 
llvm-svn: 59841
 2008-11-21 20:00:59 +00:00
Dan Gohman
30c5ce1b7d Switch the MachineOperand accessors back to the short names like 
isReg, etc., from isRegister, etc.

llvm-svn: 57006
 2008-10-03 15:45:36 +00:00
Dan Gohman
4855b659d9 Give LowerSubregs.cpp a top-level description. 
llvm-svn: 56596
 2008-09-24 23:44:12 +00:00
Evan Cheng
1ded8b6ad6 Instead of setPreservesAll, just mark them preseving machine loop info and machine dominators. 
llvm-svn: 56475
 2008-09-22 22:21:38 +00:00
Evan Cheng
3bcf0cdd72 Mark several codegen passes as preserving all analysis. 
llvm-svn: 56469
 2008-09-22 20:58:04 +00:00
Dan Gohman
e1f9be27bc Tidy up several unbeseeming casts from pointer to intptr_t. 
llvm-svn: 55779
 2008-09-04 17:05:41 +00:00
Dan Gohman
2555c4a2ca Fix indentation. 
llvm-svn: 55049
 2008-08-20 13:50:12 +00:00
Dan Gohman
74fa421281 Re-enable elimination of unnecessary SUBREG_TO_REG instructions in 
LowerSubregs, and fix an x86-64 isel bug that this exposed.

SUBREG_TO_REG for x86-64 implicit zero extension is only safe for
isel to generate when the source is known to always have zeros in
the high 32 bits. The EXTRACT_SUBREG instruction does not clear
the high 32 bits.

llvm-svn: 54444
 2008-08-07 02:54:50 +00:00
Dan Gohman
f38f99ccc5 Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks. 
Fix a leak that this turned up in LowerSubregs.cpp.
And, comment a leak in LiveIntervalAnalysis.cpp.

llvm-svn: 53746
 2008-07-17 23:49:46 +00:00
Evan Cheng
acd28b95da It's not safe to remove SUBREG_TO_REG that looks like identity copies, e.g. movl %eax, %eax on x86-64 actually does a zero-extend. 
llvm-svn: 52421
 2008-06-17 17:59:16 +00:00
Evan Cheng
8cfd1d39a1 Do not issue identity copies. 
llvm-svn: 52373
 2008-06-16 22:52:53 +00:00
Evan Cheng
9048a25037 Revert this. 
llvm-svn: 51949
 2008-06-04 17:21:44 +00:00
Evan Cheng
7504610c97 LowerSubregs should not clobber any analysis. 
llvm-svn: 51933
 2008-06-04 09:17:16 +00:00
Christopher Lamb
b4f4b41048 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. 
llvm-svn: 48412
 2008-03-16 03:12:01 +00:00
Christopher Lamb
0f1c32eb63 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. 
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
 2008-03-13 05:47:01 +00:00
Christopher Lamb
74f4d837df Recommitting parts of r48130. These do not appear to cause the observed failures. 
llvm-svn: 48223
 2008-03-11 10:09:17 +00:00
Evan Cheng
794f4ee703 Use TargetRegisterInfo::getPhysicalRegisterRegClass. Remove duplicated code. 
llvm-svn: 48221
 2008-03-11 07:55:13 +00:00
Evan Cheng
067ecbc341 Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests. 
llvm-svn: 48167
 2008-03-10 19:31:26 +00:00
Christopher Lamb
32e5ce3d96 Allow insert_subreg into implicit, target-specific values. 
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.

llvm-svn: 48130
 2008-03-10 06:12:08 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo. 
llvm-svn: 46930
 2008-02-10 18:45:23 +00:00
Owen Anderson
ae7e2c1e03 Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the 
Machine-level API cleanup instigated by Chris.

llvm-svn: 45470
 2007-12-31 06:32:00 +00:00
Chris Lattner
96167aa93c Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
 2007-12-31 04:13:23 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Evan Cheng
dc2f1b1741 isSubRegOf() is a dup of isSubRegister. 
llvm-svn: 43249
 2007-10-23 06:51:50 +00:00
Evan Cheng
5f9e291240 Allow copyRegToReg to emit cross register classes copies. 
Tested with "make check"!

llvm-svn: 42346
 2007-09-26 06:25:56 +00:00
Dan Gohman
fb60c0dfed Remove isReg, isImm, and isMBB, and change all their users to use 
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958
 2007-09-14 20:33:02 +00:00
Christopher Lamb
e0c9bd8d2e Move isSubRegOf into MRegisterInfo. Fix a missed move elimination in LowerSubregs and add more debugging output there. 
llvm-svn: 41005
 2007-08-10 21:11:55 +00:00
Christopher Lamb
8875f43912 Implement review feedback. No functionality change. 
llvm-svn: 40863
 2007-08-06 16:33:56 +00:00
Christopher Lamb
258dab5389 Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions. 
llvm-svn: 40521
 2007-07-26 08:18:32 +00:00