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Commit Graph

66830 Commits

Author SHA1 Message Date
Rafael Espindola
4007ec608c Simplify getSymbolFlags.
None of the object formats require extra parsing to compute these flags,
so the method cannot fail.

llvm-svn: 200574
2014-01-31 20:57:12 +00:00
Paul Robinson
7b5cad010e If we're not producing DWARF accel tables, don't waste memory
keeping track of those entries.

llvm-svn: 200572
2014-01-31 20:39:19 +00:00
Eric Christopher
861178d373 Add support for DW_FORM_flag and DW_FORM_flag_present to the DIE hashing
algorithm. Sink the 'A' + Attribute hash into each form so we don't
have to check valid forms before deciding whether or not we're going
to hash which will let the default be to return without doing anything.

llvm-svn: 200571
2014-01-31 20:02:58 +00:00
David Blaikie
d3fdfda01f DebugInfo: Flag type unit references as declarations
This ensures DWARF consumers don't confuse these references for
definitions. I'd argue it might be nice to improve debuggers so we don't
need this, but it's just one field in an abbreviation anyway - so it
doesn't seem worth the fight.

llvm-svn: 200569
2014-01-31 19:52:26 +00:00
Reid Kleckner
edec4d571c x86: Rename NumBytesForCalleeToPush to ...Pop for accuracy
If we have a callee cleanup convention, the callee is going to pop the
arguments off the stack, not push them on.

llvm-svn: 200566
2014-01-31 19:07:18 +00:00
Reid Kleckner
8ff8b30e4d [ms-cxxabi] Add a new calling convention that swaps 'this' and 'sret'
MSVC always places the 'this' parameter for a method first.  The
implicit 'sret' pointer for methods always comes second.  We already
implement this for __thiscall by putting sret parameters on the stack,
but __cdecl methods require putting both parameters on the stack in
opposite order.

Using a special calling convention allows frontends to keep the sret
parameter first, which avoids breaking lots of assumptions in LLVM and
Clang.

Fixes PR15768 with the corresponding change in Clang.

Reviewers: ributzka, majnemer

Differential Revision: http://llvm-reviews.chandlerc.com/D2663

llvm-svn: 200561
2014-01-31 17:41:22 +00:00
Matheus Almeida
489791e923 [mips][msa] Add insert.d instruction.
This instruction is only available on Mips64 cores that implement the MSA ASE.

llvm-svn: 200543
2014-01-31 13:31:20 +00:00
Chandler Carruth
fbc2b60e8a [vectorizer] Tweak the way we do small loop runtime unrolling in the
loop vectorizer to not do so when runtime pointer checks are needed and
share code with the new (not yet enabled) load/store saturation runtime
unrolling. Also ensure that we only consider the runtime checks when the
loop hasn't already been vectorized. If it has, the runtime check cost
has already been paid.

I've fleshed out a test case to cover the scalar unrolling as well as
the vector unrolling and comment clearly why we are or aren't following
the pattern.

llvm-svn: 200530
2014-01-31 10:51:08 +00:00
Craig Topper
e33ac72bdf Separate x86 opcode maps and 0x66/0xf2/0xf3 prefixes from each other in the TSFlags. This greatly simplifies the switch statements in the disassembler tables and the code emitters.
llvm-svn: 200522
2014-01-31 08:47:06 +00:00
Craig Topper
0754fb95c1 Move REP out of the Prefix field of the X86 format. Give it its own bit. It had special handling anyway and this enables a future patch.
llvm-svn: 200520
2014-01-31 07:00:55 +00:00
Craig Topper
fbc60780e1 Move address override handling in X86CodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.
llvm-svn: 200517
2014-01-31 05:42:35 +00:00
Craig Topper
c56f5e167f Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.
llvm-svn: 200516
2014-01-31 05:33:45 +00:00
Bob Wilson
1478ea0cc7 Fix a bug in gcov instrumentation introduced by r195513. <rdar://15930350>
The entry block of a function starts with all the static allocas. The change
in r195513 splits the block before those allocas, which has the effect of
turning them into dynamic allocas. That breaks all sorts of things. Change to
split after the initial allocas, and also add a comment explaining why the
block is split.

llvm-svn: 200515
2014-01-31 05:24:01 +00:00
Venkatraman Govindaraju
b0c5799fbd [Sparc] Save and restore float registers that may be used for parameter passing.
llvm-svn: 200509
2014-01-31 01:53:08 +00:00
Manman Ren
0552af6547 This patch teaches the DAGCombiner how to fold insert_subvector nodes
when the input is a concat_vectors and the insert replaces one of the
concat halves:

Lower half: fold (insert_subvector (concat_vectors X, Y), Z) ->
(concat_vectors Z, Y)
Upper half: fold (insert_subvector (concat_vectors X, Y), Z) ->
(concat_vectors X, Z)

This can be seen with the following IR:

define <8 x float> @lower_half(<4 x float> %v1, <4 x float> %v2, <4 x
float> %v3) {
  %1 = shufflevector <4 x float> %v1, <4 x float> %v2, <8 x i32> <i32
0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
  %2 = tail call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x
float> %1, <4 x float> %v3, i8 0)

The vinsertf128 intrinsic is converted into an insert_subvector node
in SelectionDAGBuilder.cpp.

Using AVX, without the patch this generates two vinsertf128 instructions:

vinsertf128 $1, %xmm1, %ymm0, %ymm0
vinsertf128 $0, %xmm2, %ymm0, %ymm0

With the patch this is optimized into:

vinsertf128 $1, %xmm1, %ymm2, %ymm0

Patch by Robert Lougher.

llvm-svn: 200506
2014-01-31 01:10:35 +00:00
Owen Anderson
2809d5d134 DAGCombine should not produce ISD::OR nodes after operation legalization if they're not legal.
llvm-svn: 200503
2014-01-31 00:51:43 +00:00
Manman Ren
7760d41e27 PGO branch weight: update edge weights in SelectionDAGBuilder.
When converting from "or + br" to two branches, or converting from
"and + br" to two branches, we correctly update the edge weights of
the two branches.

The previous attempt at r200431 was reverted at r200434 because of
two testing case failures. I modified my patch a little, but forgot
to re-run "make check-all".

Testing case CodeGen/ARM/lsr-unfolded-offset.ll is updated because of
the patch's impact on branch probability which causes changes in
spill placement.

llvm-svn: 200502
2014-01-31 00:42:44 +00:00
Matt Arsenault
5055466f83 Allow speculating llvm.sqrt, fma and fmuladd
This doesn't set errno, so this should be OK.
Also update the documentation to explicitly state
that errno are not set.

llvm-svn: 200501
2014-01-31 00:09:00 +00:00
David Woodhouse
10eb2a8985 [x86] Fix signed relocations for i64i32imm operands
These should end up (in ELF) as R_X86_64_32S relocs, not R_X86_64_32.
Kill the horrid and incomplete special case and FIXME in
EncodeInstruction() and set things up so it can infer the signedness
from the ImmType just like it can the size and whether it's PC-relative.

llvm-svn: 200495
2014-01-30 22:20:41 +00:00
Chad Rosier
156f3a2a96 [AArch64] Custom lower concat_vector patterns with v4i16, v4i32, v8i8, v8i16, v16i8 types.
llvm-svn: 200491
2014-01-30 21:46:54 +00:00
Timur Iskhodzhanov
04f94cf108 Fix PR18381 - print a minimal diagnostic rather than assert on unresolved .secidx target
llvm-svn: 200490
2014-01-30 21:13:05 +00:00
Rafael Espindola
fae4ff3453 Only ELF has a dynamic symbol table. Remove it from ObjectFile.
COFF has only one symbol table.
MachO has a LC_DYSYMTAB, but that is not a symbol table, just extra info about
the one symbol table (LC_SYMTAB).
IR (coming soon) also has only one table.

llvm-svn: 200488
2014-01-30 20:45:33 +00:00
Juergen Ributzka
ead2eaed6f [Stackmaps] Record the stack size of each function that contains a stackmap/patchpoint intrinsic.
Re-applying the patch, but this time without using AsmPrinter methods.

Reviewed by Andy

llvm-svn: 200481
2014-01-30 18:58:27 +00:00
Evgeniy Stepanov
000eb0d51d Reenable ARM EHABI on Android.
Broken in r200388.

llvm-svn: 200466
2014-01-30 14:18:25 +00:00
Matheus Almeida
a50e122a15 [mips] Fix typo.
llvm-svn: 200465
2014-01-30 13:40:26 +00:00
Craig Topper
aa52c4fb46 Remove duplicate patterns
llvm-svn: 200461
2014-01-30 07:19:10 +00:00
Craig Topper
d50be4c227 Remove some AddedComplexity tags that were forcing priority for AVX over SSE. Use predicates instead.
llvm-svn: 200458
2014-01-30 06:26:25 +00:00
Craig Topper
7940cc70b4 Remove duplicate pattern and add predicate checks on other patterns.
llvm-svn: 200455
2014-01-30 06:03:19 +00:00
Jakob Stoklund Olesen
412a5b3d9b Implement SPARCv9 atomic_swap_64 with a pseudo.
The SWAP instruction only exists in a 32-bit variant, but the 64-bit
atomic swap can be implemented in terms of CASX, like the other atomic
rmw primitives.

llvm-svn: 200453
2014-01-30 04:48:46 +00:00
Saleem Abdulrasool
14399e6e4b ARM IAS: support .object_arch
The .object_arch directive indicates an alternative architecture to be specified
in the object file.  The directive does *not* effect the enabled feature bits
for the object file generation.  This is particularly useful when the code
performs runtime detection and would like to indicate a lower architecture as
the requirements than the actual instructions used.

llvm-svn: 200451
2014-01-30 04:46:41 +00:00
Saleem Abdulrasool
911a8d4f8f ARM IAS: support .movsp
.movsp is an ARM unwinding directive that indicates to the unwinder that a
register contains an offset from the current stack pointer.  If the offset is
unspecified, it defaults to zero.

llvm-svn: 200449
2014-01-30 04:46:24 +00:00
Saleem Abdulrasool
89a237a2c6 ARM: suuport .tlsdescseq directive
This enhances the ARMAsmParser to handle .tlsdescseq directives.  This is a
slightly special relocation.  We must be able to generate them, but not consume
them in assembly.  The relocation is meant to assist the linker in generating a
TLS descriptor sequence.  The ELF target streamer is enhanced to append
additional fixups into the current segment and that is used to emit the new
R_ARM_TLS_DESCSEQ relocations.

llvm-svn: 200448
2014-01-30 04:02:47 +00:00
Saleem Abdulrasool
1777c48c91 ARM: support TLS descriptor relocations
Add support for tlsdesc relocations which are part of the ABI, marked as
experimental.  These relocations permit the linker to perform TLS reference
optimizations.

llvm-svn: 200447
2014-01-30 04:02:38 +00:00
Saleem Abdulrasool
cf36b84709 ARM: support tlscall relocations
This adds support for TLS CALL relocations.  TLS CALL relocations are used to
indicate to the linker to generate appropriate entries to resolve TLS references
via an appropriate function invocation (e.g. __tls_get_addr(PLT)).

In order to accomodate the linker relaxation of the TLS access model for the
references (GD/LD -> IE, IE -> LE), the relocation addend must be incomplete.
This requires that the partial inplace value is also incomplete (i.e. 0).  We
simply avoid the offset value calculation at the time of the fixup adjustment in
the ARM assembler backend.

llvm-svn: 200446
2014-01-30 04:02:31 +00:00
Juergen Ributzka
88f69803a7 Revert "[Stackmaps] Record the stack size of each function that contains a stackmap/patchpoint intrinsic."
This reverts commit r200444 to unbreak buildbots.

llvm-svn: 200445
2014-01-30 03:34:02 +00:00
Juergen Ributzka
6ef42913cf [Stackmaps] Record the stack size of each function that contains a stackmap/patchpoint intrinsic.
Reviewed by Andy

llvm-svn: 200444
2014-01-30 03:06:14 +00:00
Rafael Espindola
6148a226d5 Simplify the handling of iterators in ObjectFile.
None of the object file formats reported error on iterator increment. In
retrospect, that is not too surprising: no object format stores symbols or
sections in a linked list or other structure that requires chasing pointers.
As a consequence, all error checking can be done on begin() and end().

This reduces the text segment of bin/llvm-readobj in my machine from 521233 to
518526 bytes.

llvm-svn: 200442
2014-01-30 02:49:50 +00:00
Timur Iskhodzhanov
2cf4619945 Reland r200340 - 'Add line table debug info to COFF files when using a win32 triple'
This incorporates a couple of fixes reviewed at http://llvm-reviews.chandlerc.com/D2651

llvm-svn: 200440
2014-01-30 01:39:17 +00:00
Manman Ren
a4c69e4cda Revert r200431 due to bot failures.
llvm-svn: 200434
2014-01-30 00:53:27 +00:00
Manman Ren
a49dcc98e7 PGO branch weight: update edge weights in SelectionDAGBuilder.
When converting from "or + br" to two branches, or converting from
"and + br" to two branches, we correctly update the edge weights of
the two branches.

llvm-svn: 200431
2014-01-30 00:24:37 +00:00
Manman Ren
e23a689faf PGO branch weight: update edge weights in IfConverter.
This commit only handles IfConvertTriangle. To update edge weights
of a successor, one interface is added to MachineBasicBlock:
/// Set successor weight of a given iterator.
setSuccWeight(succ_iterator I, uint32_t weight)

An existing testing case test/CodeGen/Thumb2/v8_IT_5.ll is updated,
since we now correctly update the edge weights, the cold block
is placed at the end of the function and we jump to the cold block.

llvm-svn: 200428
2014-01-29 23:18:47 +00:00
Eric Christopher
0608c39553 Move range handling for a function to endFunction rather than
when we create the subprogram DIE.

llvm-svn: 200426
2014-01-29 23:05:43 +00:00
Eric Christopher
d551c8ded2 If we use DW_AT_ranges we need to specify a base address that ranges
are relative to in the compile unit. Currently let's just use 0...

Thanks to Greg Clayton for the catch!

llvm-svn: 200425
2014-01-29 22:22:56 +00:00
Eric Christopher
6cbd91d874 Turn on CU ranges if we've got multiple compile units in the same
module since there's no range guarantee that we could make given
output order. This also fixes up the testcases that have multiple
CUs to have the correct range offset.

llvm-svn: 200422
2014-01-29 22:06:27 +00:00
Eric Christopher
8501a676f4 Make the compile unit map a MapVector so that we can assume a stable
output ordering.

llvm-svn: 200421
2014-01-29 22:06:23 +00:00
Eric Christopher
da9e98d98a Fix formatting of comment.
llvm-svn: 200420
2014-01-29 22:06:21 +00:00
David Majnemer
c3f8d074b2 MC: Better management of macro arguments
The linux kernel makes uses of a GAS `feature' which substitutes nothing
for macro arguments which aren't specified.

Proper support for these kind of macro arguments necessitated a cleanup of
differences between `GAS' and `Darwin' dialect macro processing.

Differential Revision: http://llvm-reviews.chandlerc.com/D2634

llvm-svn: 200409
2014-01-29 18:57:46 +00:00
Jordan Rose
990729fc2a [CommandLine] Aliases require an value if their target requires a value.
This can still be overridden by explicitly setting a value requirement on the
alias option, but by default it should be the same.

PR18649

llvm-svn: 200407
2014-01-29 18:54:17 +00:00
Lang Hames
fbd5c97fba Add support for PC-relative non-extern relocations to RuntimeDyldMachO.
Also replaces testcase for r180790 (support for absolute non-externs relocs)
with a more robust version.

<rdar://problem/15864721>

llvm-svn: 200404
2014-01-29 18:31:35 +00:00
Quentin Colombet
99cdbaf711 [X86][SchedModel] Fix typos in the definitions of the ports for Haswell.
llvm-svn: 200403
2014-01-29 18:26:59 +00:00