RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 22:42:46 +02:00
Code Issues Projects Releases Wiki Activity
120,458 Commits 4 Branches 5 Tags 704 MiB
4047ccf510
Commit Graph

2 Commits

Author SHA1 Message Date
Richard Osborne
5c2cbafeba Add instruction encodings and disassembly for 1r instructions. 
llvm-svn: 170293
 2012-12-16 17:37:34 +00:00
Richard Osborne
4209832082 Add XCore disassembler. 
Currently there is no instruction encoding info and
XCoreDisassembler::getInstruction() always returns Fail. I intend to add
instruction encodings and tests in follow on commits.

llvm-svn: 170292
 2012-12-16 17:29:14 +00:00