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190808 Commits

Author SHA1 Message Date
Florian Hahn
421b40f37f [Matrix] Mark expressions shared between multiple remarks.
This patch adds support for explicitly highlighting sub-expressions
shared by multiple leaf nodes. For example consider the following
code

  %shared.load = tail call <8 x double> @llvm.matrix.columnwise.load.v8f64.p0f64(double* %arg1, i32 %stride, i32 2, i32 4), !dbg !10, !noalias !10
  %trans = tail call <8 x double> @llvm.matrix.transpose.v8f64(<8 x double> %shared.load, i32 2, i32 4), !dbg !10
  tail call void @llvm.matrix.columnwise.store.v8f64.p0f64(<8 x double> %trans, double* %arg3, i32 10, i32 4, i32 2), !dbg !10
  %load.2 = tail call <30 x double> @llvm.matrix.columnwise.load.v30f64.p0f64(double* %arg3, i32 %stride, i32 2, i32 15), !dbg !10, !noalias !10
  %mult = tail call <60 x double> @llvm.matrix.multiply.v60f64.v8f64.v30f64(<8 x double> %trans, <30 x double> %load.2, i32 4, i32 2, i32 15), !dbg !11
  tail call void @llvm.matrix.columnwise.store.v60f64.p0f64(<60 x double> %mult, double* %arg2, i32 10, i32 4, i32 15), !dbg !11

We have two leaf nodes (the 2 stores) and the first store stores %trans
which is also used by the matrix multiply %mult. We generate separate
remarks for each leaf (stores). To denote that parts are shared, the
shared expressions are marked as shared (), with a reference to the
other remark that shares it. The operation summary also denotes the
shared operations separately.

Reviewers: anemet, Gerolf, thegameg, hfinkel, andrew.w.kaylor, LuoYuanke

Reviewed By: anemet

Differential Revision: https://reviews.llvm.org/D72526
2020-01-28 09:27:55 -08:00
Jonathan Roelofs
a7b7627d67 [llvm] Fix broken cases of 'CHECK[^:]*$' in tests 2020-01-28 09:52:59 -07:00
Florian Hahn
e8ba9a5cf3 [LV] Hoist code to mark conditional assumes as dead to caller (NFC).
This is a follow-up suggested in D73423. It is sufficient to just add
the conditional assumes to DeadInstructions once.
2020-01-28 08:50:44 -08:00
Konstantin Pyzhov
982370f4be Summary:
This CL adds clang declarations of built-in functions for AMDGPU MFMA intrinsics and instructions.
OpenCL tests for new built-ins are included.

Differential Revision: https://reviews.llvm.org/D72723
2020-01-28 03:51:27 -05:00
Michael Liao
c62162ff3b Fix warning of -Wcast-qual. NFC. 2020-01-28 11:36:43 -05:00
Florian Hahn
70d4652ead [LV] Do not try to sink dead instructions.
Dead instructions do not need to be sunk. Currently we try and record
the recipies for them, but there are no recipes emitted for them and
there's nothing to sink. They can be removed from SinkAfter while
marking them for recording.

Fixes PR44634.

Reviewers: rengolin, hsaito, fhahn, Ayal, gilr

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D73423
2020-01-28 08:28:03 -08:00
LLVM GN Syncbot
6ffae95289 [gn build] Port a32f894f17b 2020-01-28 15:50:50 +00:00
Jonathan Roelofs
da50eee8a5 [ADT] Remove more llvm::make_unique
https://reviews.llvm.org/D73316
2020-01-28 08:48:50 -07:00
Nico Weber
eaba97bb99 Prevent building with MSVC 14.24
MSVC 14.24 miscompiles some of LLVM's code, which makes at least these tests fail:

    LLVM :: MC/MachO/gen-dwarf-cpp.s
    LLVM :: MC/MachO/gen-dwarf-macro-cpp.s
    LLVM :: MC/MachO/gen-dwarf-producer.s
    LLVM :: MC/MachO/gen-dwarf.s

It seems better to diagnose that at build time. Since both the previous
and the next version have a fix, this might be good enough and we might
not need a real workaround. (We ran into this at
https://crbug.com/1045948)

If you hit this, use either a newer or an older version of MSVC,
or use clang-cl as host compiler.

Differential Revision: https://reviews.llvm.org/D73550
2020-01-28 10:11:06 -05:00
Victor Huang
c2d91820e1 [PowerPC][Future] Add pld and pstd to future CPU
Add the prefixed instructions pld and pstd to future CPU. These are load and
store instructions that require new operand types that are 34 bits. This patch
adds the two instructions as well as the operand types required.

Note that this patch also makes a minor change to tablegen to account for the
fact that some instructions are going to require shifts greater than 31 bits
for the new 34 bit instructions.

Differential Revision: https://reviews.llvm.org/D72574
2020-01-28 08:23:29 -06:00
Whitney Tsang
03f2c49843 [CodeMoverUtils] Improve IsControlFlowEquivalent.
Summary:
Currently IsControlFlowEquivalent determine if two blocks are control
flow equivalent by checking if A dominates B and B post dominates A.
There exists blocks that are control flow equivalent even if they don't
satisfy the A dominates B and B post dominates A condition.
For example,

if (cond)
  A
if (cond)
  B
In the PR, we determine if two blocks are control flow equivalent by
also checking if the two sets of conditions A and B depends on are
equivalent.
Reviewer: jdoerfert, Meinersbur, dmgreen, etiotto, bmahjour, fhahn,
hfinkel, kbarton
Reviewed By: fhahn
Subscribers: hiraditya, llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D71578
2020-01-28 14:18:00 +00:00
Wang, Pengfei
f83f5a6e3c Fix sphinx build bot failure. NFCI. 2020-01-28 22:07:34 +08:00
Sam Parker
7e91753023 [NFC][RDA] typedef SmallPtrSetImpl<MachineInstr*> 2020-01-28 13:15:44 +00:00
Benjamin Kramer
cad5b9a068 [ADT] Implicitly convert between StringRef and std::string_view when we have C++17
This makes the types almost seamlessly interchangeable in C++17
codebases. Eventually we want to replace StringRef with the standard
type, but that requires C++17 being the default and a huge refactoring
job as StringRef has a lot more functionality.
2020-01-28 13:56:12 +01:00
Wang, Pengfei
5a4cadf22e [FPEnv] Add pragma FP_CONTRACT support under strict FP.
Summary: Support pragma FP_CONTRACT under strict FP.

Reviewers: craig.topper, andrew.w.kaylor, uweigand, RKSimon, LiuChen3

Subscribers: hiraditya, jdoerfert, cfe-commits, llvm-commits, LuoYuanke

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D72820
2020-01-28 20:43:43 +08:00
Miloš Stojanović
aa11a47d4c [mips][NFC] Remove unused instruction formats
`BranchBase` unused sice: rL170663
`FI` unsused since: rL170954
`FFI` unused since: rL190221

Differential revision: https://reviews.llvm.org/D73489
2020-01-28 13:30:59 +01:00
Wang, Pengfei
335158c8c4 [X86] Add combination for fma and fneg on X86 under strict FP.
Summary: X86 has instructions to calculate fma and fneg at the same time. But we combine the fneg and fma only when fneg is the source operand under strict FP.

Reviewers: craig.topper, andrew.w.kaylor, uweigand, RKSimon, LiuChen3

Subscribers: LuoYuanke, llvm-commits, cfe-commits, jdoerfert, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72824
2020-01-28 20:09:56 +08:00
James Henderson
b93b2eeaa3 Revert "[DebugInfo] Make most debug line prologue errors non-fatal to parsing"
This reverts commit b94191fecdbadc18b342a27df1109754edcb8c4b.

The change broke both an LLD test and the LLDB build.
2020-01-28 11:49:30 +00:00
James Henderson
89524e5f12 [DebugInfo] Make most debug line prologue errors non-fatal to parsing
Many of the debug line prologue errors are not inherently fatal. In most
cases, we can make reasonable assumptions and carry on. This patch does
exactly that. In the case of length problems, the approach of "the
claimed length is correct" is taken to be consistent with other
instances such as the SectionParser, which ignores the read length.

Reviewed by: dblaikie

Differential Revision: https://reviews.llvm.org/D72158
2020-01-28 11:29:50 +00:00
Benjamin Kramer
af311296b9 [docs] Clarify llvm.used semantics with less awkward wording 2020-01-28 12:13:57 +01:00
Jay Foad
13c67e5bdd [AMDGPU] Fix vccz after v_readlane/v_readfirstlane to vcc_lo/hi
Summary:
Up to gfx9, writes to vcc_lo and vcc_hi by instructions like
v_readlane and v_readfirstlane do not update vccz to reflect the new
value of vcc. Fix it by reusing part of the existing vccz bug handling
code, which inserts an "s_mov_b64 vcc, vcc" instruction to restore vccz
just before an instruction that needs the correct value.

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69661
2020-01-28 10:52:17 +00:00
Kazushi (Jam) Marukawa
f45f5036d5 [VE] call isel with stack passing
Summary:
Function calls and stack-passing of function arguments.
Custom lowering, isel patterns and tests.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D73461
2020-01-28 10:55:47 +01:00
Georgii Rymar
f9514fd7a6 [llvm-readobj][test] - Remove --symbols --dyn-syms part from Object/readobj-shared-object.test.
The intention of Object/readobj-shared-object.test was to check the
general output for shared object.

I've added a case for testing dynamic objects to ELF/symbols.test.
Also we already test dynamic symbols printing in ELF/dyn-symbols.test +
I've added a case for `--dyn-syms` alias in D73164.

Hence we can remove this piece from Object/readobj-shared-object.test.

Differential revision: https://reviews.llvm.org/D73175
2020-01-28 12:36:29 +03:00
Guillaume Chatelet
d0726321ba Update tests for @llvm.memcpy.inline intrinsics 2020-01-28 10:32:43 +01:00
Guillaume Chatelet
f36c97fee8 Fix failing bot 2020-01-28 10:20:55 +01:00
Kazushi (Jam) Marukawa
cbb481f509 [VE] enable unaligned load/store isel
Summary: Enable unaligned load/store isel for iN and fp32/64 and tests.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D73448
2020-01-28 09:53:37 +01:00
Guillaume Chatelet
1afb32cf33 [instrinsics] Add @llvm.memcpy.inline instrinsics
Summary:
This is a follow up on D61634. It adds an LLVM IR intrinsic to allow better implementation of memcpy from C++.
A follow up CL will add the intrinsics in Clang.

Reviewers: courbet, theraven, t.p.northover, jdoerfert, tejohnson

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71710
2020-01-28 09:42:01 +01:00
Florian Hahn
7b27c55d67 [Matrix] Mark remarks test as AArch64 specific. 2020-01-27 18:00:43 -08:00
Florian Hahn
c497f867de [Matrix] Add info about number of operations to remarks.
This patch updates the remark to also include a summary of the number of
vector operations generated for each matrix expression.

Reviewers: anemet, Gerolf, thegameg, hfinkel, andrew.w.kaylor, LuoYuanke

Reviewed By: anemet

Differential Revision: https://reviews.llvm.org/D72480
2020-01-27 17:43:39 -08:00
Shoaib Meenai
6725efeddd [llvm] Fix file ignoring inside directories
We have some ! patterns in the .gitignore (for the projects and runtimes
directories), and those patterns end up overriding the previous file
ignores, such that e.g. a .swp file inside the runtimes directory isn't
ignored. Move the file ignores last to ensure they take effect.

Differential Revision: https://reviews.llvm.org/D73253
2020-01-27 17:00:33 -08:00
Shoaib Meenai
c228b68834 [runtimes] Support install-*-stripped targets
This is needed to support including runtime targets in
LLVM_DISTRIBUTION_COMPONENTS.

Differential Revision: https://reviews.llvm.org/D73252
2020-01-27 17:00:24 -08:00
Shoaib Meenai
a5903d2009 [runtimes] Fix installation for LLVM_RUNTIME_DISTRIBUTION_COMPONENTS
The installation target we create should trigger the corresponding
installation target in the runtimes external project.

Differential Revision: https://reviews.llvm.org/D73251
2020-01-27 17:00:18 -08:00
Wei Mi
b78044c97c [LV] Remove nondeterminacy by changing LoopVectorizationLegality::Reductions
from DenseMap to MapVector

The iteration order of LoopVectorizationLegality::Reductions matters for the
final code generation, so we better use MapVector instead of DenseMap for it
to remove the nondeterminacy. reduction-order.ll in the patch is an example
reduced from the case we saw. In the output of opt command, the order of the
select instructions in the vector.body block keeps changing from run to run
currently.

Differential Revision: https://reviews.llvm.org/D73490
2020-01-27 16:53:20 -08:00
Florian Hahn
47a33e71d6 [Matrix] Add optimization remarks for matrix expression.
Generate remarks for matrix operations in a function. To generate remarks
for matrix expressions, the following approach is used:
1. Collect leafs of matrix expressions (done in
   RemarkGenerator::getExpressionLeafs).  Leafs are lowered matrix
   instructions without other matrix users (like stores).

2. For each leaf, create a remark containing a linearizied version of the
   matrix expression.

The following improvements will be submitted as follow-ups:
* Summarize number of vector instructions generated for each expression.
* Account for shared sub-expressions.
* Propagate matrix remarks up the inlining chain.

The information provided by the matrix remarks helps users to spot cases
where matrix expression got split up, e.g. due to inlining not
happening. The remarks allow users to address those issues, ensuring
best performance.

Reviewers: anemet, Gerolf, thegameg, hfinkel, andrew.w.kaylor, LuoYuanke

Reviewed By: anemet

Differential Revision: https://reviews.llvm.org/D72453
2020-01-27 16:39:29 -08:00
Fangrui Song
d65797733b Reland "[StackColoring] Remap PseudoSourceValue frame indices via MachineFunction::getPSVManager()""
Reland 7a8b0b1595e7dc878b48cf9bbaa652087a6895db, with a fix that checks
`!E.value().empty()` to avoid inserting a zero to SlotRemap.

Debugged by rnk@ in https://bugs.chromium.org/p/chromium/issues/detail?id=1045650#c33

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D73510
2020-01-27 15:58:49 -08:00
Reid Kleckner
85e933eefe [IR] Keep a double break between functions when printing a module
This behavior appears to have changed unintentionally in
b0e979724f2679e4e6f5b824144ea89289bd6d56.

Instead of printing the leading newline in printFunction, print it when
printing a module. This ensures that `OS << *Func` starts printing
immediately on the current line, but whole modules are printed nicely.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D73505
2020-01-27 15:31:09 -08:00
Reid Kleckner
7bdbe4665a [WinEH] Re-run stack coloring test for i686
This would've caught https://crbug.com/1045650, which resulted in the
revert of 7a8b0b1595e7dc878b48cf9bbaa652087a6895db.
2020-01-27 15:26:03 -08:00
Evgenii Stepanov
d2f0ede221 Support zero size types in StackSafetyAnalysis.
Reviewers: vitalybuka

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73395
2020-01-27 15:22:59 -08:00
Evgenii Stepanov
a55605a524 Fix StackSafetyAnalysis crash with scalable vector types.
Summary:
Treat scalable allocas as if they have storage size of 0, and
scalable-typed memory accesses as if their range is unlimited.

This is not a proper support of scalable vector types in the analysis -
we can do better, but not today.

Reviewers: vitalybuka

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73394
2020-01-27 15:22:59 -08:00
Florian Hahn
aadd018f63 [AArch64] Add option to enable/disable load-store renaming.
This patch adds a new option to enable/disable register renaming in the
load-store optimizer. Defaults to disabled, as there is a potential
mis-compile caused by this.
2020-01-27 15:15:50 -08:00
Eric Schweitz
377ffc3bc4 remove a trailing space character (test commit) 2020-01-27 15:01:55 -08:00
Matt Arsenault
c134e9710f AMDGPU/GlobalISel: Eliminate SelectVOP3Mods_f32
Trivial type predicates should be moved into the tablegen pattern
itself, and not checked inside complex patterns. This eliminates a
redundant complex pattern, and fixes select source modifiers for
GlobalISel.

I have further patches which fully handle select in tablegen and
remove all of the C++ selection, although it requires the ugliness to
support the entire range of legal register types.
2020-01-27 17:53:54 -05:00
Jay Foad
1eddee5ba9 [GlobalISel] Make use of KnownBits::computeForAddSub
Summary:
This is mostly NFC. computeForAddSub may give more precise results in
some cases, but that doesn't seem to affect any existing GlobalISel
tests.

Subscribers: rovka, hiraditya, volkan, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73431
2020-01-27 22:22:56 +00:00
Stephen Neuendorffer
fd541e396d [examples] Fix CMakefiles for JITLink and OrcError library refactoring
The examples need explicit library dependencies when building with
BUILD_SHARED_LIBS=on
2020-01-27 13:58:50 -08:00
Sanjay Patel
665298049e [InstCombine] allow more narrowing of casted select
D47163 created a rule that we should not change the casted
type of a select when we have matching types in its compare condition.
That was intended to help vector codegen, but it also could create
situations where we miss subsequent folds as shown in PR44545:
https://bugs.llvm.org/show_bug.cgi?id=44545

By using shouldChangeType(), we can continue to get the vector folds
(because we always return false for vector types). But we also solve
the motivating bug because it's ok to narrow the scalar select in that
example.

Our canonicalization rules around select are a mess, but AFAICT, this
will not induce any infinite looping from the reverse transform (but
we'll need to watch for that possibility if committed).

Side note: there's a similar use of shouldChangeType() for phi ops
just below this diff, and the source and destination types appear to
be reversed.

Differential Revision: https://reviews.llvm.org/D72733
2020-01-27 16:35:50 -05:00
Simon Pilgrim
1cf1e98f38 [DAG] Enable ISD::EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handling
This allows SimplifyDemandedBits to call SimplifyMultipleUseDemandedBits to create a simpler ISD::EXTRACT_SUBVECTOR, which is particularly useful for cases where we're splitting into subvectors anyhow.

Differential Revision: This allows SimplifyDemandedBits to call SimplifyMultipleUseDemandedBits to create a simpler ISD::EXTRACT_SUBVECTOR, which is particularly useful for cases where we're splitting into subvectors anyhow.
2020-01-27 21:17:47 +00:00
Adrian Prantl
7a0267fdba Fix an assertion failure in DwarfExpression's subregister composition
This patch fixes an assertion failure in DwarfExpression that is
triggered when a complex fragment has exactly the size of a
subregister of the register the DBG_VALUE points to *and* there is no
DWARF encoding for the super-register.

I took the opportunity to replace/document some magic values with
static constructor functions to make this code less confusing to read.

rdar://problem/58489125

Differential Revision: https://reviews.llvm.org/D72938
2020-01-27 12:44:37 -08:00
Roman Lebedev
fdfa5834a9 [NFC][LoopVectorize] Autogenerate tests affected by isHighCostExpansionHelper() cost modelling (PR44668) 2020-01-27 23:34:30 +03:00
Roman Lebedev
9bf8fcc900 [NFC][IndVarSimplify] Autogenerate tests affected by isHighCostExpansionHelper() cost modelling (PR44668) 2020-01-27 23:34:29 +03:00
Matt Arsenault
75fe3f5ccf AMDGPU/GlobalISel: Select buffer atomics
The cmpswap handling is incomplete and fails to select.
2020-01-27 15:16:44 -05:00