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Commit Graph

150997 Commits

Author SHA1 Message Date
David L. Jones
56cf7e2d17 [lit] Remove dead code not referenced in the LLVM SVN repo.
Summary:
This change removes the intermediate 'FileBasedTest' format from lit. This
format is only ever used by the ShTest format, so the logic can be moved into
ShTest directly.

In order to better clarify what the TestFormat subclasses do, I fleshed out the
TestFormat base class with Python's notion of abstract methods, using
@abc.abstractmethod. This gives a convenient way to document the expected
interface, without the risk of instantiating an abstract class (that's what
ABCMeta does -- it raises an exception if you try to instantiate a class which
has abstract methods, but not if you instantiate a subclass that implements
them).

Reviewers: zturner, modocache

Subscribers: sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D34792

llvm-svn: 306623
2017-06-29 01:01:03 +00:00
Eric Beckmann
dc36515d44 Revert "Replace trivial use of external rc.exe by writing our own .res file."
This reverts commit d4c7e9fc63c10dbab0c30186ef8575474a704496.

This is done in order to address the failure of CrWinClangLLD etc. bots.
These throw an error of "side-by-side configuration is incorrect" during
compilation, which sounds suspiciously related to these manifest
changes.

Revert "Switch external cvtres.exe for llvm's own resource library."

This reverts commit 71fe8ef283a9dab9a3f21432c98466cbc23990d1.

llvm-svn: 306618
2017-06-29 00:17:26 +00:00
Craig Topper
6ca704c308 [InstCombine] In visitXor, use m_Not on the instruction itself instead of looking for all ones in Op1. This is consistent with 3 other not checks before this one. NFCI
llvm-svn: 306617
2017-06-29 00:07:08 +00:00
Eugene Zelenko
42b9403673 [CodeView] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 306616
2017-06-29 00:05:44 +00:00
Keno Fischer
351728e70c [InstCombine] Retain TBAA when narrowing memory accesses
Summary:
As discussed on the mailing list it is legal to propagate TBAA to loads/stores
from/to smaller regions of a larger load tagged with TBAA. Do so for
(load->extractvalue)=>(gep->load) and similar foldings.

Reviewed By: sanjoy
Differential Revision: https://reviews.llvm.org/D31954

llvm-svn: 306615
2017-06-28 23:36:40 +00:00
Mandeep Singh Grang
4137c9c02a [NFC] Remove multiple semicolons
Reviewers: bogner, whitequark, mgrang

Reviewed By: mgrang

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34785

llvm-svn: 306613
2017-06-28 23:15:16 +00:00
Adrian McCarthy
93bf3cda7e Introduce symbol cache to PDB NativeSession
Instead of creating symbols directly in the findChildren methods of the native
symbol implementations, they will rely on the NativeSession to act as a factory
for these types.  This lets NativeSession cache the NativeRawSymbols in its
new symbol cache and makes that cache the source of unique IDs for the symbols.

Right now, this affects only NativeCompilandSymbols.  There's no external
change yet, so I think the existing tests are still sufficient.  Coming soon
are patches to extend this to built-in types and enums.

llvm-svn: 306610
2017-06-28 22:47:40 +00:00
Xin Tong
93e5ab4f1c Revert "Make OrderedInstructions and OrderedBasicBlock use AssertingVH, to try and catch mistakes"
This reverts commit 50ec560f05dcb8a1be18be442660d0305bc7de25.

It catches some bug in NewGVN it seems. I am in middle of something and will not be able to investigate
Revert for now.

http://lab.llvm.org:8011/builders/clang-atom-d525-fedora-rel/builds/6268

llvm-svn: 306608
2017-06-28 22:35:54 +00:00
Xin Tong
b0e062b44a Make OrderedInstructions and OrderedBasicBlock use AssertingVH, to try and catch mistakes
Summary: Make OrderedInstructions and OrderedBasicBlock use AssertingVH to try and catch mistakes

Reviewers: efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34780

llvm-svn: 306605
2017-06-28 22:12:22 +00:00
Matt Arsenault
9eac763e7b AMDGPU: Remove SITypeRewriter
This was an old workaround for using v16i8 in some old intrinsics
for resource descriptors.

llvm-svn: 306603
2017-06-28 21:38:50 +00:00
David L. Jones
b366d853fe [lit] Remove dead code (not referenced anywhere), and clarify some function names.
Summary:
The dead code seems to be unreferenced, according to textual search across the
LLVM SVN repo.

The clarification part of this change alters the name of a module-level function
so that it is different from the name of the class-methods that call it.
Currently, there are no erroneous references, but stylistically (c.f. PEP-8),
internal "helper" functions should generally be named accordingly by prepending
an underscore. (I also chose to add '_impl', which isn't necessary, but helps me
at least to mentally disambiguate the interface and implementation functions.)

Reviewers: zturner, modocache

Subscribers: sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D34775

llvm-svn: 306600
2017-06-28 21:14:13 +00:00
Eric Christopher
d98793b65a Fix a typo.
llvm-svn: 306599
2017-06-28 21:10:31 +00:00
Stanislav Mekhanoshin
0b47718863 Fold fneg and fabs like multiplications
Given no NaNs and no signed zeroes it folds:

(fmul X, (select (fcmp X > 0.0), -1.0, 1.0)) -> (fneg (fabs X))
(fmul X, (select (fcmp X > 0.0), 1.0, -1.0)) -> (fabs X)

Differential Revision: https://reviews.llvm.org/D34579

llvm-svn: 306592
2017-06-28 20:25:50 +00:00
Sanjay Patel
13ebc88748 [InstCombine] add tests for icmp with bitreversed ops; NFC
This is similar enough to bswap that we might as well handle them together in one patch.

llvm-svn: 306591
2017-06-28 20:02:35 +00:00
Mandeep Singh Grang
0b9107d38e [AArch64] Make assert messages uniform and general [NFC]
Summary: Make assert messages related to Darwin, ELF and COFF uniform.

Reviewers: rnk, ruiu, compnerd, t.p.northover

Reviewed By: t.p.northover

Subscribers: t.p.northover, aemerson, rengolin, javed.absar, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D34730

llvm-svn: 306589
2017-06-28 19:37:38 +00:00
Geoff Berry
435a31552e [AArch64][Falkor] Attempt to fix Windows buildbots
llvm-svn: 306588
2017-06-28 19:36:10 +00:00
Rafael Espindola
283765ba69 Reuse existing variables. NFC.
llvm-svn: 306586
2017-06-28 19:26:37 +00:00
Krzysztof Parzyszek
0f2ec767aa Break up long lines, NFC
llvm-svn: 306585
2017-06-28 18:59:18 +00:00
Geoff Berry
538bbb867e [AArch64][Falkor] Try to avoid exhausting HW prefetcher resources when unrolling.
Reviewers: t.p.northover, mcrosier

Subscribers: aemerson, rengolin, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D34533

llvm-svn: 306584
2017-06-28 18:53:09 +00:00
Rafael Espindola
484d581d90 Reuse existing variable. NFC.
llvm-svn: 306582
2017-06-28 18:24:02 +00:00
Jakub Kuderski
9239fcc349 [Dominators] Move helper functions into SemiNCAInfo
Summary: Helper functions (DFSPass, ReverseDFSPass, Eval) need SemiNCAInfo anyway, so it's simpler to have them there as member functions. This also makes them simpler by removing template boilerplate.

Reviewers: dberlin, sanjoy, chandlerc

Reviewed By: dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34427

llvm-svn: 306579
2017-06-28 18:15:45 +00:00
Simon Pilgrim
955e536a26 [BBVectorize][X86] Regenerate simple tests
llvm-svn: 306578
2017-06-28 18:08:40 +00:00
Craig Topper
8ab4c3019f [InstCombine] Remove 64-bit bit width restriction from m_ConstantInt(uint64_t*&)
I think we only need to make sure the value fits in 64-bits not that bit width is 64-bit.

This helps places that use this for shift amounts since the shift amount needs to be the same bitwidth as the LHS, but can't be larger than the bit width.

Differential Revision: https://reviews.llvm.org/D34737

llvm-svn: 306577
2017-06-28 18:07:29 +00:00
Jakub Kuderski
f8565643e7 [Dominators] Move SemiNCAInfo and helper functions out of DominatorTreeBase
Summary:
This moves SemiNCAInfo from DeminatorTreeBase to GenericDomTreeConstruction. It also put helper functions used during tree constructions in the same file.

The point of this change is to further clean up DominatorTreeBase and make it easier to construct and verify (in future patches).

Reviewers: dberlin, sanjoy, chandlerc

Reviewed By: dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34420

llvm-svn: 306576
2017-06-28 18:00:36 +00:00
Ayal Zaks
10c351befb [LV] Fix PR33613 - retain order of insertelement per part
r306381 caused PR33613, by reversing the order in which insertelements were
generated per unroll part. This patch fixes PR33613 by retraining this order,
placing each set of insertelements per part immediately after the last scalar
being packed for this part. Includes a test case derived from PR33613.

Reference: https://bugs.llvm.org/show_bug.cgi?id=33613
Differential Revision: https://reviews.llvm.org/D34760

llvm-svn: 306575
2017-06-28 17:59:33 +00:00
Jakub Kuderski
1587b387ad [Dominators] Move IDoms out of DominatorTreeBase and put them in SNCAInfo
Summary: The temporary IDoms map was used only during DomTree calculation. We can move it to SNCAInfo so that it's no longer a DominatorTreeBase member.

Reviewers: sanjoy, dberlin, chandlerc

Reviewed By: dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34317

llvm-svn: 306574
2017-06-28 17:56:09 +00:00
Rafael Espindola
cd6839055b Fix PR33625.
We were failing to convert this expression to pcrel.

llvm-svn: 306573
2017-06-28 17:56:07 +00:00
Jakub Kuderski
4e9170ce41 [Dominators] Move InfoRec outside of DominatorTreeBase
Summary:
The InfoRec struct is used only during tree construction, so there is no point having it as a DominatorTreeBase member.

This patch moves it into the Calculate function instead and makes it pass it to its helper functions.

Reviewers: sanjoy, dberlin, chandlerc

Reviewed By: dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34305

llvm-svn: 306572
2017-06-28 17:43:54 +00:00
Simon Pilgrim
d76b8e7e3e [BBVectorize] Regenerate simple tests
llvm-svn: 306571
2017-06-28 17:40:20 +00:00
Rafael Espindola
beb8a68d37 Don't repeat name in comment and format. NFC.
llvm-svn: 306568
2017-06-28 17:23:13 +00:00
Chih-Hung Hsieh
c0579ea4d6 Another test commit.
llvm-svn: 306567
2017-06-28 17:12:51 +00:00
Geoff Berry
c5845df49e [LoopUnroll] Fix bug in computeUnrollCount causing it to not honor MaxCount
Reviewers: sanjoy, anna, reames, apilipenko, igor-laevsky, mkuper

Subscribers: mcrosier, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D34532

llvm-svn: 306564
2017-06-28 17:01:15 +00:00
Sanjay Patel
935e8d59bb [InstCombine] add tests for icmp with bswapped operands; NFC
llvm-svn: 306563
2017-06-28 16:56:45 +00:00
Jakub Kuderski
7a0cc0a004 [Dominators] Move number to node mapping out of DominatorTreeBase
Summary: Number to node mapping in DominatorTreeBase is used only during calculation, so there is no point keeping is as a member variable. This patch moves this mapping to Calculate function and passes it to helper functions. It also makes the name more descriptive.

Reviewers: sanjoy, dberlin, davide, chandlerc

Reviewed By: dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34295

llvm-svn: 306562
2017-06-28 16:54:34 +00:00
Sanjay Patel
4ca37431f8 [InstCombine] use local variable to reduce code; NFCI
llvm-svn: 306560
2017-06-28 16:39:06 +00:00
Krzysztof Parzyszek
f0d7f8cfbb Rangify loops, formatting changes, use bool instead of unsigned, NFC
llvm-svn: 306557
2017-06-28 16:02:00 +00:00
Rafael Espindola
2319d98c5f Don't repeat names and reformat. NFC.
llvm-svn: 306556
2017-06-28 16:00:16 +00:00
Geoff Berry
9c1c467f23 [LoopUnroll] Pass SCEV to getUnrollingPreferences hook. NFCI.
Reviewers: sanjoy, anna, reames, apilipenko, igor-laevsky, mkuper

Subscribers: jholewinski, arsenm, mzolotukhin, nemanjai, nhaehnle, javed.absar, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D34531

llvm-svn: 306554
2017-06-28 15:53:17 +00:00
Krzysztof Parzyszek
f7b4320d1e Missed a check for UndefVI in r306466
llvm-svn: 306553
2017-06-28 15:46:16 +00:00
Daniel Sanders
6684d3531b [globalisel][tablegen] Post-commit review nits for r306388. NFC
One early exit and a missing assert string.

llvm-svn: 306552
2017-06-28 15:16:03 +00:00
Alexandros Lamprineas
db0ecdf907 [AArch64] AArch64CondBrTuningPass generates wrong branch instructions
Some conditional branch instructions generated by this pass are checking
the wrong condition code. The instructions TBZ and TBNZ are transformed
into B.GE and B.LT instead of B.PL and B.MI respectively. They should
only be checking the Negative bit.

Differential Revision: https://reviews.llvm.org/D34743

llvm-svn: 306550
2017-06-28 15:09:11 +00:00
Rafael Espindola
b169e694a8 Don't repeat name in comments. 80 columns. NFC.
llvm-svn: 306548
2017-06-28 14:59:30 +00:00
John Brawn
3ad0317ae0 [ARM] Improve if-conversion for M-class CPUs without branch predictors
The current heuristic in isProfitableToIfCvt assumes we have a branch predictor,
and so gives the wrong answer in some cases when we don't. This patch adds a
subtarget feature to indicate that a subtarget has no branch predictor, and
changes the heuristic in isProfitableToiIfCvt when it's present. This gives a
slight overall improvement in a set of embedded benchmarks on Cortex-M4 and
Cortex-M33.

Differential Revision: https://reviews.llvm.org/D34398

llvm-svn: 306547
2017-06-28 14:11:15 +00:00
Simon Pilgrim
ed751c8384 [X86] Added BSWAP tests for illegal i64/i128/i256 'wide' scalar integers
llvm-svn: 306546
2017-06-28 14:07:50 +00:00
Simon Pilgrim
5590b85a43 [X86][SSE] Dropped -mcpu from vector bswap tests
Use triple and attribute only for consistency 

llvm-svn: 306545
2017-06-28 13:59:15 +00:00
Daniel Sanders
6250250252 [globalisel][tablegen] Multiple 80-col corrections.
llvm-svn: 306544
2017-06-28 13:50:04 +00:00
Michael Zuckerman
f5fad38c21 [X86][LLVM][test]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess test.
Exapnding the test to include AVX target. 
Adding base tast (to trunk) for Store strid=4 vf=32. 

llvm-svn: 306543
2017-06-28 13:42:45 +00:00
Easwaran Raman
e471d35c72 Create inliner params based on size and opt levels.
Differential revision: https://reviews.llvm.org/D34309

llvm-svn: 306542
2017-06-28 13:33:49 +00:00
Teresa Johnson
3be58ceecd Add zero-length check to memcpy/memset load store loop expansion
Summary:
I was testing using this expansion logic in other cases besides
NVPTX, and found some runtime failures due to the lack of a check
for a zero length memcpy/memset before the loop. There is already
such a check in the memmove expansion code though.

Reviewers: hfinkel

Subscribers: jholewinski, wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D34707

llvm-svn: 306541
2017-06-28 13:07:37 +00:00
Igor Breger
0276bd1729 [GlobalISel][X86] Test G_CONSTANT i32 0 TableGen'erated selection.NFC.
llvm-svn: 306537
2017-06-28 12:43:21 +00:00