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434153a2b4
Commit Graph

211 Commits

Author SHA1 Message Date
Evan Cheng
434153a2b4 Added support for variable_ops. 
llvm-svn: 28788
 2006-06-14 22:22:20 +00:00
Evan Cheng
191886d10f Fix support for optional input flag. 
llvm-svn: 28784
 2006-06-14 19:27:50 +00:00
Evan Cheng
fe3e6e1967 getOperandNum(): error if specified operand number is out of range. 
llvm-svn: 28775
 2006-06-13 21:47:27 +00:00
Chris Lattner
f506d91be6 Wrap to 80 cols 
llvm-svn: 28743
 2006-06-09 23:59:44 +00:00
Evan Cheng
1e9556ee06 Can't trust NodeDepth when checking for possibility of load folding creating 
a cycle. This increase the search space and will increase compile time (in
practice it appears to be small, e.g. 176.gcc goes from 62 sec to 65 sec)
that will be addressed later.

llvm-svn: 28476
 2006-05-25 20:16:55 +00:00
Evan Cheng
2a4c04d35a Fixed a really ugly bug. The TableGen'd isel is not freeing the "inflight set" 
correctly. That is causing non-deterministic behavior (and possibly preventing
some load folding from happening).

llvm-svn: 28458
 2006-05-25 00:21:44 +00:00
Evan Cheng
accb9d0378 Now that iPTR is a fully resolved type. We end up losing the type check for 
patterns that look like this:

def : Pat<(i32 (X86Wrapper tconstpool  :$dst)), (MOV32ri tconstpool  :$dst)>;

InsertOneTypeCheck should copy the type from the resolved pattern to the
unresolved one as long as there types are different.

llvm-svn: 28389
 2006-05-19 07:24:32 +00:00
Evan Cheng
5dc3e33623 Remove PointerType from target definition. Use abstract type MVT::iPTR to 
represent pointer type.

llvm-svn: 28363
 2006-05-17 20:37:59 +00:00
Evan Cheng
d4a056116c Allow patterns to refer to physical registers that belong to multiple 
register classes.

llvm-svn: 28323
 2006-05-16 07:05:30 +00:00
Evan Cheng
3d1e1ffd9b Unused instruction 
llvm-svn: 28240
 2006-05-12 07:42:01 +00:00
Evan Cheng
2af8a9f980 Watch out for the following case: 
1. Use expects a chain output.
2. Node is expanded into multiple target ops.
3. One of the inner node produces a chain, the outer most one doesn't.

llvm-svn: 28209
 2006-05-10 02:47:57 +00:00
Evan Cheng
0655b538d6 Fix a load folding bug. It is exposed by a multi- resulting instructions 
def : Pat<> pattern.

llvm-svn: 28208
 2006-05-10 00:05:46 +00:00
Evan Cheng
9f21c2daf4 Remove the temporary option: -no-isel-fold-inflight 
llvm-svn: 28012
 2006-04-28 18:54:11 +00:00
Evan Cheng
3466555d87 When isel'ing a node, mark its operands "InFlight" before selecting them. These 
nodes should not be folded into other nodes.
This fixes the miscompilation of PR 749.
Temporarily under flag control.

llvm-svn: 28002
 2006-04-28 02:08:10 +00:00
Nate Begeman
7ed816f900 JumpTable support! What this represents is working asm and jit support for 
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.

llvm-svn: 27947
 2006-04-22 18:53:45 +00:00
Evan Cheng
adc5e703ca Rename AddedCost to AddedComplexity. 
llvm-svn: 27841
 2006-04-19 20:36:09 +00:00
Evan Cheng
318120f8ad Allow "let AddedCost = n in" to increase pattern complexity. 
llvm-svn: 27834
 2006-04-19 18:07:24 +00:00
Chris Lattner
9f8d5b538e Infer element types for shuffle masks 
llvm-svn: 27456
 2006-04-06 20:36:51 +00:00
Chris Lattner
7f54d730f1 rename a method, to avoid confusion with llvm intrinsics. 
llvm-svn: 27455
 2006-04-06 20:19:52 +00:00
Chris Lattner
ef86937943 Allow bits init values to be used in patterns, turn them into ints. 
llvm-svn: 27286
 2006-03-31 05:25:56 +00:00
Chris Lattner
39d2d17cb3 Implement Regression/TableGen/DagDefSubst.ll 
llvm-svn: 27263
 2006-03-30 22:50:40 +00:00
Chris Lattner
723cb246c9 Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums. 
Also, don't emit dynamic checks when we can compute them statically

llvm-svn: 27202
 2006-03-28 00:41:33 +00:00
Chris Lattner
a092011a5c Print error messages like this: 
tblgen: In STVEBX: Intrinsic 'llvm.ppc.altivec.stvebx' expects 3 operands, not 2 operands!

instead of like this:
tblgen: In STVEBX: Intrinsic 'intrinsic_void expects 3 operands, not 2 operands!

llvm-svn: 27185
 2006-03-27 22:21:18 +00:00
Chris Lattner
ed2f2220da Add a missing check which cause an invalid .td file to crash tblgen 
llvm-svn: 27126
 2006-03-25 22:12:44 +00:00
Chris Lattner
e7a3b00d6a When failing selection for an intrinsic, print this: 
Cannot yet select: intrinsic %llvm.ppc.altivec.lvx

instead of this:

Cannot yet select: 0x9b047e0: v4i32,ch = INTRINSIC 0x9b04540:1, 0x9b04710, 0x9b04790, 0x9b04540

llvm-svn: 27110
 2006-03-25 06:47:53 +00:00
Chris Lattner
de644c5e88 Change approach so that we get codegen for free for intrinsics. With this, 
intrinsics that don't take pointer arguments now work.  For example, we can
compile this:

int test3( __m128d *A) {
  return _mm_movemask_pd(*A);
}
int test4( __m128 *A) {
  return _mm_movemask_ps(*A);
}

to this:

_test3:
        movl 4(%esp), %eax
        movapd (%eax), %xmm0
        movmskpd %xmm0, %eax
        ret
_test4:
        movl 4(%esp), %eax
        movaps (%eax), %xmm0
        movmskps %xmm0, %eax
        ret

llvm-svn: 27090
 2006-03-24 23:10:39 +00:00
Chris Lattner
d054091a40 fix 80 column violations 
llvm-svn: 27084
 2006-03-24 21:52:20 +00:00
Chris Lattner
92a040dbbf Parse intrinsics correctly and perform type propagation. This doesn't currently 
emit the code to select intrinsics, but that is next :)

llvm-svn: 27082
 2006-03-24 21:48:51 +00:00
Evan Cheng
b632a1d0d5 Allow result node to be a simple leaf node. This enable bitconvert patterns 
like this:
def : Pat<(v4i32 (bitconvert (v4f32 VR128:$src))), (v4i32 VR128:$src)>;

llvm-svn: 26968
 2006-03-23 02:35:32 +00:00
Evan Cheng
d21f479c5f Don't forget to promote xform function to an explicit node for def : Pat<> 
patterns.

llvm-svn: 26929
 2006-03-21 20:44:17 +00:00
Chris Lattner
4da595f4c8 minor code simplification 
llvm-svn: 26918
 2006-03-21 06:42:58 +00:00
Evan Cheng
e87add642d The node wrapped in PatLeaf<> should be treated as a leaf even if it isn't 
one, i.e. don't select it.

llvm-svn: 26909
 2006-03-20 22:53:06 +00:00
Evan Cheng
38a1075865 It should be ok for a xform output type to be different from input type. 
llvm-svn: 26899
 2006-03-20 08:09:17 +00:00
Evan Cheng
f0effde00d Copy matching pattern's output type info to instruction result pattern. 
The instruction patterns do not contain enough information to resolve the
exact type of the destination if it of a generic vector type.

llvm-svn: 26892
 2006-03-20 06:04:09 +00:00
Chris Lattner
eb65663732 Add a new SDTCisIntVectorOfSameSize type constraint 
llvm-svn: 26890
 2006-03-20 05:39:48 +00:00
Evan Cheng
df3c89dd52 Temporary hack to enable more (store (op (load ...))) folding. This makes 
it possible when a TokenFactor is between the load and store. But is still
missing some cases due to ordering issue.

llvm-svn: 26638
 2006-03-09 08:19:11 +00:00
Evan Cheng
71c62ae1f4 Don't generate silly matching code like this: 
if (N1.getOpcode() == ISD::ADD &&
     ...)
   if (... &&
       (N1.getNumOperands() == 1 || !isNonImmUse(N1.Val, N10.Val))) &&
       ...)

TableGen knows N1 must have more than one operand.

llvm-svn: 26592
 2006-03-07 08:31:27 +00:00
Chris Lattner
1ffa8d3666 Select inline asm memory operands. 
llvm-svn: 26349
 2006-02-24 02:13:31 +00:00
Evan Cheng
110f651cba Bump up pattern cost if the resulting instruction is marked 
usesCustomDAGSchedInserter.

llvm-svn: 26282
 2006-02-18 02:33:09 +00:00
Evan Cheng
e8a0e56482 Call InsertISelMapEntry rather than map insertion operator to prevent overly 
aggrssive inlining. This reduces Select_store frame size from 24k to 10k.

llvm-svn: 26095
 2006-02-09 22:12:27 +00:00
Evan Cheng
fd9315eaaa Match getTargetNode() changes (now returns SDNode* instead of SDOperand). 
llvm-svn: 26084
 2006-02-09 07:16:09 +00:00
Evan Cheng
521e5a1bfe Change Select() from 
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067
 2006-02-09 00:37:58 +00:00
Evan Cheng
0ff5d88abd Hoist all SDOperand declarations within a Select_{opcode}() to the top level 
to reduce stack memory usage. This is intended to work around the gcc bug.

llvm-svn: 26026
 2006-02-07 00:37:41 +00:00
Evan Cheng
2af9230f1e At the end of isel, select a replacement node for each handle that does not 
have one. This can happen if a load's real uses are dead (i.e. they do not
have uses themselves).

llvm-svn: 26014
 2006-02-06 08:12:55 +00:00
Evan Cheng
6f1778d4e1 Name change. 
llvm-svn: 26013
 2006-02-06 06:03:35 +00:00
Evan Cheng
09b5e544a9 Handle HANDLENODE: just return itself. 
llvm-svn: 26011
 2006-02-05 08:46:14 +00:00
Evan Cheng
0b5d4a10a9 Allow more loads to be folded which were previously prevented from happening 
due to ordering issue. i.e. they were selected for chain use first.
Now at load select time, check if it is being selected for a chain use and if
it has only a single real use. If so, return a HANDLENODE (with the load as
its operand) in its place and record it.
When it is folded or the load is selected for a real use, the isel records it
as the replacement for the HANDLENODE. The replacement is done when all nodes
are selected.
This scheme exposed a couple of problems where cycles can happen. (See comments
in EmitMatchCode() for descriptions of the problems and their workaround /
solutions.) These problems have been resolved with a small compile time
penality.

llvm-svn: 25995
 2006-02-05 06:43:12 +00:00
Evan Cheng
d5d3d7ad9e Re-committing the last bit of change. It shouldn't break PPC this time. 
llvm-svn: 25982
 2006-02-05 05:22:18 +00:00
Chris Lattner
951217976d Temporarily revert the last change, which breaks PPC and other targets that 
DO select things.

llvm-svn: 25970
 2006-02-04 09:23:06 +00:00
Evan Cheng
6a366c5eda Complex pattern's custom matcher should not call Select() on any operands. 
Select them afterwards if it returns true.

llvm-svn: 25968
 2006-02-04 08:50:49 +00:00