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2 Commits

Author SHA1 Message Date
QingShan Zhang
d6a743b7f8 [PowerPC] Improve the way legalize mul for v8i16 and add pattern to match mul + add 
We can legalize the operation MUL for v8i16 with instruction (vmladduhm A, B, 0)
if altivec enabled. Now, it is set as custom and expand it later, which is not
the right way. And then, we can add the pattern to match the mul + add with (vmladduhm A, B, C)

Reviewed By: Nemanjai

Differential Revision: https://reviews.llvm.org/D76751
 2020-03-26 04:46:49 +00:00
QingShan Zhang
7b103ebd13 [NFC][Test][PowerPC] Add one test to verify the behavior of vector 
mul/add for v8i16
 2020-03-25 02:37:26 +00:00