Jim Grosbach
ef5c63cafe
Add tests for ARM PKH assembly parsing.
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llvm-svn: 135696
2011-07-21 19:02:03 +00:00
Jim Grosbach
9c558ee8ce
Add parsing/encoding tests for ARM ORR instruction.
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llvm-svn: 135602
2011-07-20 18:48:53 +00:00
Jim Grosbach
173559ac44
Consolidate ARM NOP encoding test.
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llvm-svn: 135600
2011-07-20 18:39:38 +00:00
Jim Grosbach
a2e8523f81
ARM parsing and encoding tests for MVN
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llvm-svn: 135599
2011-07-20 18:37:08 +00:00
Jim Grosbach
1514063b5f
ARM assembly parsing of MUL instruction.
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Correctly handle 's' bit and predication suffices. Add parsing and encoding
tests.
llvm-svn: 135596
2011-07-20 18:20:31 +00:00
Jim Grosbach
e70c8eb49a
Tweak ARM assembly parsing and printing of MSR instruction.
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The system register spec should be case insensitive. The preferred form for
output with mask values of 4, 8, and 12 references APSR rather than CPSR.
Update and tidy up tests accordingly.
llvm-svn: 135532
2011-07-19 22:45:10 +00:00
Jim Grosbach
720b8c6578
ARM assembly parsing of MRS instruction.
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Teach the parser to recognize the APSR and SPSR system register names. Add
and update tests accordingly.
llvm-svn: 135527
2011-07-19 21:59:29 +00:00
Jim Grosbach
40cce44255
Move mr[r]c[2] ARM tests and tidy up a bit.
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llvm-svn: 135517
2011-07-19 20:28:56 +00:00
Jim Grosbach
69686aec2b
ARM testcases for MOVT.
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llvm-svn: 135516
2011-07-19 20:23:25 +00:00
Jim Grosbach
9debba28ed
ARM assembly parsing for MOV (register).
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Correct the handling of the 's' suffix when parsing ARM mode. It's only a
truly separate opcode in Thumb. Add test cases to make sure we handle
the s and condition suffices correctly, including diagnostics.
llvm-svn: 135513
2011-07-19 20:10:31 +00:00
Jim Grosbach
294b83e3e2
ARM assembly parsing for MOV (immediate).
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Add range checking for the immediate operand and handle the "mov" mnemonic
choosing between encodings based on the value of the immediate. Add tests
for fixups, encoding choice and values, and diagnostic for out of range values.
llvm-svn: 135500
2011-07-19 19:13:28 +00:00
Jim Grosbach
7656c6f97e
Add some testcases for ARM MLA/MLS instructions.
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llvm-svn: 135196
2011-07-14 21:43:05 +00:00
Jim Grosbach
2ab898973a
ARM MCRR/MCRR2 immediate operand range checking.
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llvm-svn: 135192
2011-07-14 21:26:42 +00:00
Jim Grosbach
27ebbba831
ARM MCR/MCR2 assembly parsing operand constraints.
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The immediate operands are restricted to 0-7. Enforce that when parsing
assembly.
llvm-svn: 135189
2011-07-14 21:19:17 +00:00
Jim Grosbach
aebb9cdf68
Update ARM Assembly of LDM/STM.
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ldm/stm are the cannonical spellings for ldmia/stmia, so use them as such.
Update the parsing/encoding tests accordingly.
llvm-svn: 135168
2011-07-14 18:35:38 +00:00
Jim Grosbach
ebbd82a248
ARM ISB assembly parsing tests.
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llvm-svn: 135158
2011-07-14 18:02:25 +00:00
Jim Grosbach
76bd4e6f75
ARM tests for EOR instruction parsing and encoding.
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llvm-svn: 135119
2011-07-14 00:22:21 +00:00
Jim Grosbach
4b63d59acb
ARM Assembler support for DSB instruction.
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Add instalias for default 'sy' option. Add tests.
llvm-svn: 135116
2011-07-14 00:18:13 +00:00
Jim Grosbach
5a96cebd81
ARM Assembler support for DMB instruction.
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Flesh out the options supported for the instruction. Shuffle tests a bit and
add entries for the rest of the options. Add an alias to handle the default
operand of "sy".
llvm-svn: 135109
2011-07-13 23:40:38 +00:00
Jim Grosbach
c0ec4205e2
ARM Assembler support for DBG instruction.
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Add range checking and testing for parsing and encoding of DBG instruction.
llvm-svn: 135102
2011-07-13 22:59:38 +00:00
Jim Grosbach
25a4b8922d
ARM parsing and encoding tests for CMN/CMP.
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llvm-svn: 135098
2011-07-13 22:26:58 +00:00
Jim Grosbach
d5e74991f0
Shuffle ARM assembly tests a bit.
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llvm-svn: 135095
2011-07-13 22:19:10 +00:00
Jim Grosbach
fd2ebb4552
Range checking for CDP[2] immediates.
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llvm-svn: 135092
2011-07-13 22:01:08 +00:00
Jim Grosbach
c7e0941dac
Testcases for ARM assembly BX/BXJ instructions.
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llvm-svn: 135078
2011-07-13 20:25:46 +00:00
Jim Grosbach
0313701671
Testcases for ARM assembly BLX/BL instructions.
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llvm-svn: 135072
2011-07-13 20:11:04 +00:00
Jim Grosbach
0caa098513
Range checking for 16-bit immediates in ARM assembly.
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llvm-svn: 135071
2011-07-13 20:10:10 +00:00
Jim Grosbach
9e021b5281
Add tests for ARM parsing of 'BKPT' instruction.
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llvm-svn: 135063
2011-07-13 19:17:36 +00:00
Jim Grosbach
ce9b6636b3
Fix copy-pasto.
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llvm-svn: 135062
2011-07-13 19:16:30 +00:00
Jim Grosbach
9d1a4de9e6
Add tests for ARM parsing of 'BIC' instruction.
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llvm-svn: 135061
2011-07-13 19:12:32 +00:00
Jim Grosbach
7aea4b177f
Add some FIXMEs.
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Keeping the instructions in alphabetical order, just like in the ARM ARM.
Adding FIXMEs for skipped instructions when adding tests out of order.
llvm-svn: 135060
2011-07-13 19:10:23 +00:00
Jim Grosbach
9b9604762e
Add tests for ARM parsing of 'AND' instruction.
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llvm-svn: 135056
2011-07-13 18:55:14 +00:00
Jim Grosbach
a0a947a8ca
Add tests for ARM parsing of 'ADD' instruction
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llvm-svn: 135053
2011-07-13 18:12:46 +00:00
Jim Grosbach
7dbb39dffa
Destination register operand is optional for ADC and SBC ARM.
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llvm-svn: 135052
2011-07-13 17:57:17 +00:00
Jim Grosbach
5db1296fcd
Flesh out ARM Parser support for shifted-register operands.
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Now works for parsing register shifted register and register shifted
immediate arithmetic instructions, including the 'rrx' rotate with extend.
llvm-svn: 135049
2011-07-13 17:50:29 +00:00
Jim Grosbach
295e53b228
Add check for predicate w/o S bit.
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llvm-svn: 134987
2011-07-12 16:25:04 +00:00
Jim Grosbach
fae61bb435
Fix recognition of ARM 'adcs' mnemonic.
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The 'CS' is not a predication suffix in this case.
llvm-svn: 134903
2011-07-11 17:09:57 +00:00