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Commit Graph

73483 Commits

Author SHA1 Message Date
Owen Anderson
461ad5951b Fix a subtle issue in SmallVector. The following code did not work as expected:
vec.insert(vec.begin(), vec[3]);
The issue was that vec[3] returns a reference into the vector, which is invalidated when insert() memmove's the elements down to make space.  The method needs to specifically detect and handle this case to correctly match std::vector's semantics.

Thanks to Howard Hinnant for clarifying the correct behavior, and explaining how std::vector solves this problem.

llvm-svn: 134554
2011-07-06 22:36:59 +00:00
Devang Patel
47d505f9ef Handle cases where multiple dbg.declare and dbg.value intrinsics are tied to one alloca.
llvm-svn: 134549
2011-07-06 22:06:11 +00:00
Evan Cheng
5b5fb8c78b Add ARM MC registry routines.
llvm-svn: 134547
2011-07-06 22:02:34 +00:00
Evan Cheng
b0e0a318b7 Rename files for consistency.
llvm-svn: 134546
2011-07-06 22:01:53 +00:00
Nick Lewycky
233eabb210 Add ImmutableList::contains(). Patch by Rui Paulo!
llvm-svn: 134545
2011-07-06 21:59:48 +00:00
Jim Grosbach
9863be57e0 Mark ARM pseudo-instructions as isPseudo.
This allows us to remove the (bogus and unneeded) encoding information from
the pseudo-instruction class definitions. All of the pseudos that haven't
been converted yet and still need encoding information instance from the normal
instruction classes and explicitly set isCodeGenOnly, and so are distinct
from this change.

llvm-svn: 134540
2011-07-06 21:35:46 +00:00
Jim Grosbach
68759971b3 Don't require pseudo-instructions to carry encoding information.
For now this is distinct from isCodeGenOnly, as code-gen-only
instructions can (and often do) still have encoding information
associated with them. Once we've migrated all of them over to true
pseudo-instructions that are lowered to real instructions prior to
the printer/emitter, we can remove isCodeGenOnly and just use isPseudo.

llvm-svn: 134539
2011-07-06 21:33:38 +00:00
Devang Patel
214fa1739f Simplify. Consolidate dbg.declare handling in AllocaPromoter.
llvm-svn: 134538
2011-07-06 21:09:55 +00:00
Andrew Trick
f80318e090 indvars -disable-iv-rewrite: ExprToMap lives in Pass data, so be more
careful about referencing values.

llvm-svn: 134537
2011-07-06 21:07:10 +00:00
Jim Grosbach
99ece4392a Remove un-used encoding info from Pseudo MLAv5.
Pseudo-instructions don't have encoding information, as they're lowered
to real instructions by the time we're doing binary encoding.

llvm-svn: 134533
2011-07-06 20:57:35 +00:00
Eli Friedman
c3200e013c Fix missing triple support for RTEMS target.
llvm-svn: 134532
2011-07-06 20:56:26 +00:00
Andrew Trick
641b6e4222 indvars -disable-iv-rewrite: Added SimplifyCongruentIVs.
llvm-svn: 134530
2011-07-06 20:50:43 +00:00
Eli Friedman
4a5a5b1a0a Remove some unnecessary includes.
llvm-svn: 134528
2011-07-06 20:48:27 +00:00
Bill Wendling
479007f9af Constify getCompactUnwindRegNum.
llvm-svn: 134527
2011-07-06 20:33:48 +00:00
Evan Cheng
dcd3ea7062 createMCInstPrinter doesn't need TargetMachine anymore.
llvm-svn: 134525
2011-07-06 19:45:42 +00:00
Tobias Grosser
eda1c1a7ce LICM: Remove trailing white spaces
llvm-svn: 134521
2011-07-06 19:20:02 +00:00
Tobias Grosser
97b1ec50e3 LICM: Do not loose alignment on promotion
The promotion code lost any alignment information, when hoisting loads and
stores out of the loop. This lead to incorrect aligned memory accesses. We now
use the largest alignment we can prove to be correct.

llvm-svn: 134520
2011-07-06 19:19:55 +00:00
Jakub Staszak
4f5defff42 Add documenation about "branch_weight" metadata and __builtin_expect instruction
llvm-svn: 134517
2011-07-06 18:31:02 +00:00
Jakub Staszak
28bcc8673e Introduce "expect" intrinsic instructions.
llvm-svn: 134516
2011-07-06 18:22:43 +00:00
Kevin Enderby
43cb64711d Update MC/ELF/relocation.s with change to X86 PUSH64i8 in r134501.
llvm-svn: 134511
2011-07-06 17:55:20 +00:00
Kevin Enderby
59ba10f2ac Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that a
push with a small constant produces a 2-byte push.

llvm-svn: 134501
2011-07-06 17:23:46 +00:00
David Greene
20bb374315 Allow tagless builds and fix debug build configuration.
llvm-svn: 134498
2011-07-06 16:54:14 +00:00
Evan Cheng
1112260be0 Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo.
llvm-svn: 134457
2011-07-06 02:02:33 +00:00
Dan Gohman
151e8ce446 Revert r134366 and add an explicit triple to make this test host-independent.
llvm-svn: 134447
2011-07-05 22:09:19 +00:00
Dan Gohman
7927fe2250 Remove the ObjC ARC passes from the default optimization list, and add
extension points to be used by clang.

llvm-svn: 134444
2011-07-05 22:01:44 +00:00
Devang Patel
bfd474b954 Preserve debug loc.
llvm-svn: 134441
2011-07-05 21:48:22 +00:00
Devang Patel
5f3ea5c3cb Speculatively revert r134431.
llvm-svn: 134440
2011-07-05 21:16:28 +00:00
Benjamin Kramer
b054fe79e3 Use memcmp.
llvm-svn: 134439
2011-07-05 20:28:00 +00:00
Rafael Espindola
9fdf25214f Really fix typo :-(
llvm-svn: 134436
2011-07-05 19:17:10 +00:00
Rafael Espindola
1b99dbcf82 Fix typo.
llvm-svn: 134433
2011-07-05 19:13:27 +00:00
Devang Patel
de1261583f Clear debug loc while updating insert point.
llvm-svn: 134431
2011-07-05 18:58:22 +00:00
Chad Rosier
bd4367f810 By default mkstemp() creates a temporary file with mode 0600, but the mode
used for open is 0666.  Therefore, add the necessary permission bits for
consistency.
rdar://8621462

llvm-svn: 134430
2011-07-05 18:55:31 +00:00
Jakob Stoklund Olesen
57f59c98ed Break infinite loop when the Hopfield network oscillates.
This is impossible in theory, I can prove it. In practice, our near-zero
threshold can cause the network to oscillate between equally good
solutions.

<rdar://problem/9720596>

llvm-svn: 134428
2011-07-05 18:46:42 +00:00
Rafael Espindola
e54f949f37 Compare all 4 bytes of the header.
llvm-svn: 134427
2011-07-05 18:41:47 +00:00
Eli Friedman
9765ae0015 Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, use proper aliases for the pclmullqlqdq and friends. PR10269.
llvm-svn: 134424
2011-07-05 18:21:20 +00:00
Andrew Trick
8823fc0040 indvars -disable-iv-rewrite: avoid multiple IVs in weird cases.
Putting back the helper that I removed on 7/1 to do this right.

llvm-svn: 134423
2011-07-05 18:19:39 +00:00
Jim Grosbach
315fbb6aea ARM estimateStackSize() needs to account for simplified call frames.
If the function allocates reserved stack space for callee argument frames,
estimateStackSize() needs to account for that, as it doesn't show up as
ordinary frame objects. Otherwise, a callee with a large argument list will
throw off the calculations for whether to allocate an emergency spill slot
and we get assert() failures in the register scavenger.

rdar://9715469

llvm-svn: 134415
2011-07-05 16:05:50 +00:00
Jakob Stoklund Olesen
f95a1068bd Fix PR10277.
Remat during spilling triggers dead code elimination. If a phi-def
becomes unused, that may also cause live ranges to split into separate
connected components.

This type of splitting is different from normal live range splitting. In
particular, there may not be a common original interval.

When the split range is its own original, make sure that the new
siblings are also their own originals. The range being split cannot be
used as an original since it doesn't cover the new siblings.

llvm-svn: 134413
2011-07-05 15:38:41 +00:00
Jakob Stoklund Olesen
c380e517fd Tweak comment and debug output.
llvm-svn: 134412
2011-07-05 15:38:37 +00:00
Michael J. Spencer
4b7808fe50 Fix 80-col.
llvm-svn: 134409
2011-07-05 14:49:08 +00:00
Michael J. Spencer
342a6e8a5f Fix warnings.
llvm-svn: 134408
2011-07-05 14:48:59 +00:00
Tobias Grosser
85fed4b998 SuccIterator on bbs without terminator insts
Remove the assert that triggers if SuccIterator is constructed for a basic block
without a terminator instruction. Instead of triggering an assert a succ_end()
iterator is returned. This models a basic block with zero successors and allows
us to use F->viewCFG() on incompletely constructed functions.

llvm-svn: 134398
2011-07-04 23:09:02 +00:00
Benjamin Kramer
2d266249a6 PR10267: Don't combine an equality compare with an AND into an inequality compare when the AND has more than one use.
This can pessimize code, inequalities are generally more expensive.

llvm-svn: 134379
2011-07-04 20:16:36 +00:00
Roman Divacky
08f7d5cf91 Remove accidentaly left node from previous iteration of the patch.
Noticed by Benjamin Kramer!

llvm-svn: 134376
2011-07-04 15:42:45 +00:00
Rafael Espindola
29113212a6 Move early tail duplication earlier.
This fixes the issue noted in PR10251 where early tail dup of bbs with
indirectbr would cause a bb to be duplicated into a loop preheader
and then into its predecessors, creating phi nodes with identical
operands just before register allocation.

This helps with jsinterp.o size (__TEXT goes from 163568 to 126656)
and a bit with performance 1.005x faster on sunspider (jits still enabled).

The result on webkit with the jit disabled is more significant: 1.021x faster.

llvm-svn: 134372
2011-07-04 04:54:22 +00:00
Rafael Espindola
962773db64 Move most of the pre BB code to TailDuplicateAndUpdate. Change the
HasIndirectbr variable to be just that. No functionality change.

llvm-svn: 134371
2011-07-04 01:21:42 +00:00
Rafael Espindola
ce4f4ff705 Reduce indentation and fix the count of how many PHIs we have inserted.
llvm-svn: 134370
2011-07-04 00:13:36 +00:00
Jakob Stoklund Olesen
9950d41b39 Fix PR10244.
A split point inserted in a block with a landing pad successor may be
hoisted above the call to ensure that it dominates all successors. The
code that handles the rest of the basic block must take this into
account.

I am not including a test case, it would be very fragile. PR10244 comes
from building clang with exceptions enabled.

llvm-svn: 134369
2011-07-04 00:05:28 +00:00
Roman Divacky
eae7daa59b Make the i64 and f64 be 64bit ABI aligned in the target description.
This is what both the ABI and clang says.

llvm-svn: 134367
2011-07-03 16:24:07 +00:00
NAKAMURA Takumi
c0837d703b test/CodeGen/X86/lsr-nonaffine.ll: Relax expressions for Win64 CC to appease Win32 hosts.
llvm-svn: 134366
2011-07-03 09:26:14 +00:00