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Commit Graph

11 Commits

Author SHA1 Message Date
Andrew Trick
134b2a5907 Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.

Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.

Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.

Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.

ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.

ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.

llvm-svn: 122541
2010-12-24 05:03:26 +00:00
Andrew Trick
53f4556c64 whitespace
llvm-svn: 122539
2010-12-24 04:28:06 +00:00
Dan Gohman
616845c384 Eliminate the use of PriorityQueue and just use a std::vector,
implementing pop with a linear search for a "best" element. The priority
queue was a neat idea, but in practice the comparison functions depend
on dynamic information.

llvm-svn: 104718
2010-05-26 18:52:00 +00:00
Dan Gohman
3391366b42 Fix indentation.
llvm-svn: 104717
2010-05-26 18:37:48 +00:00
Dan Gohman
59cddd1327 Change push_all to a non-virtual function and implement it in the
base class, since all the implementations are the same.

llvm-svn: 104659
2010-05-26 01:10:55 +00:00
Dan Gohman
ba28c900a2 Delete an unused function.
llvm-svn: 104658
2010-05-26 00:56:27 +00:00
David Goodwin
8954ccb109 Remove some old experimental code that is no longer needed. Remove additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks.
llvm-svn: 89471
2009-11-20 19:32:48 +00:00
David Goodwin
629a685f05 Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed.
llvm-svn: 85939
2009-11-03 20:57:50 +00:00
Dan Gohman
40a40dd7c1 Fix some register-alias-related bugs in the post-RA scheduler liveness
computation code. Also, avoid adding output-depenency edges when both
defs are dead, which frequently happens with EFLAGS defs.

Compute Depth and Height lazily, and always in terms of edge latency
values. For the schedulers that don't care about latency, edge latencies
are set to 1.

Eliminate Cycle and CycleBound, and LatencyPriorityQueue's Latencies array.
These are all subsumed by the Depth and Height fields.

llvm-svn: 61073
2008-12-16 03:25:46 +00:00
Dan Gohman
1967880025 Update CalcLatency to work in terms of edge latencies, rather than
node latencies. Use CalcLatency instead of manual code in
CalculatePriorities to keep it consistent. Previously it
computed slightly different results.

llvm-svn: 60817
2008-12-10 00:24:36 +00:00
Dan Gohman
f4b2751ee6 Experimental post-pass scheduling support. Post-pass scheduling
is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.

This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.

The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.

llvm-svn: 59676
2008-11-19 23:18:57 +00:00