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Commit Graph

4802 Commits

Author SHA1 Message Date
Dan Gohman
ae161c1522 Fix -view-sunit-dags to support cross-rc-copy nodes.
llvm-svn: 48664
2008-03-21 22:51:06 +00:00
Evan Cheng
32a6116ffd A couple of kill marker maintainence bug.
llvm-svn: 48653
2008-03-21 19:09:30 +00:00
Duncan Sands
4153fc30c9 Introduce a new node for holding call argument
flags.  This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines.  There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness.  As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.

llvm-svn: 48640
2008-03-21 09:14:45 +00:00
Christopher Lamb
110f66ca68 Check even more carefully before applying this DAGCombine transform.
llvm-svn: 48580
2008-03-20 04:31:39 +00:00
Evan Cheng
8ecb189245 Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
llvm-svn: 48578
2008-03-20 02:18:41 +00:00
Chris Lattner
6c4486c5c7 detabify llvm, patch by Mike Stump!
llvm-svn: 48577
2008-03-20 01:22:40 +00:00
Christopher Lamb
958b0494c3 Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
llvm-svn: 48542
2008-03-19 08:30:06 +00:00
Evan Cheng
e9aa507edc Fixed a coalescer bug caused by a typo.
llvm-svn: 48526
2008-03-19 02:26:36 +00:00
Evan Cheng
3d9309c11d Fix live variables issues:
1. If part of a register is re-defined, an implicit kill and an implicit def are added to denote read / mod / write. However, this should only be necessary if the register is actually read later. This is a performance issue.
2. If a sub-register is being defined, and it doesn't have a previous use, do not add a implicit kill to the last use of a super-register:
   = EAX, AX<imp-use,kill>
...
AX =
In this case, EAX is live but AX is killed, this is wrong and will cause the coalescer to do bad things.

llvm-svn: 48521
2008-03-19 00:52:20 +00:00
Bill Wendling
5ea2aec3ac Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.
llvm-svn: 48510
2008-03-18 22:29:51 +00:00
Dale Johannesen
7f51ebc90c Make conversions of i8/i16 to ppcf128 work.
llvm-svn: 48493
2008-03-18 17:28:38 +00:00
Christopher Lamb
1d70509b55 Target independent DAG transform to use truncate for field extraction + sign extend on targets where this is profitable. Passes nightly on x86-64.
llvm-svn: 48491
2008-03-18 16:46:39 +00:00
Evan Cheng
5750c3cd1e Rewrite code that propagate isDead information after a dead copy is coalesced. This remove some ugly spaghetti code and fixed a number of subtle bugs.
llvm-svn: 48490
2008-03-18 08:26:47 +00:00
Owen Anderson
5da16e856c A first attempt at updating live intervals, with code lifted from
the coalescer.  This doesn't really work, but gets us farther than
before.

llvm-svn: 48446
2008-03-17 06:08:26 +00:00
Christopher Lamb
b4f4b41048 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
llvm-svn: 48412
2008-03-16 03:12:01 +00:00
Evan Cheng
9af68f56c5 Remove isImplicitDef TargetInstrDesc flag.
llvm-svn: 48381
2008-03-15 00:19:36 +00:00
Evan Cheng
11d2c09adc Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
llvm-svn: 48380
2008-03-15 00:03:38 +00:00
Duncan Sands
3760c87373 Do not generate special entries in the dwarf eh
table for nounwind calls.

llvm-svn: 48373
2008-03-14 21:36:24 +00:00
Evan Cheng
3612a7ed30 Fix PR2138. Apparently any modification to a std::multimap (including remove entries for a different key) can invalidate multimap iterators.
llvm-svn: 48371
2008-03-14 20:44:01 +00:00
Duncan Sands
d3859c83a5 Simplify using getIntPtrConstant.
llvm-svn: 48355
2008-03-14 05:23:57 +00:00
Nate Begeman
f06c08e652 Tabs -> spaces
Use getIntPtrConstant in a couple places to shorten stuff up
Handle splitting vector shuffles with undefs in the mask

llvm-svn: 48351
2008-03-14 00:53:31 +00:00
Evan Cheng
1ce3ba341d Livein copy scheduling fixes: do not coalesce physical register copies, correctly determine the safe location to insert the copies.
llvm-svn: 48348
2008-03-14 00:14:55 +00:00
Dan Gohman
486f664806 More APInt-ification.
llvm-svn: 48344
2008-03-13 22:13:53 +00:00
Evan Cheng
b479bf0d0c Undo tweak. It had no obvious benefit.
llvm-svn: 48341
2008-03-13 17:42:48 +00:00
Evan Cheng
a7c38d1ce9 Typo.
llvm-svn: 48337
2008-03-13 08:04:35 +00:00
Evan Cheng
9a7395ba78 Don't try to sink 3-address instruction if convertToThreeAddress created more than one instructions.
llvm-svn: 48336
2008-03-13 07:56:58 +00:00
Evan Cheng
38a8da7b16 Remove an unused command line option.
llvm-svn: 48334
2008-03-13 06:38:28 +00:00
Evan Cheng
0b8b1647dd TwoAddressInstructionPass enhancement. After it converts a two address instruction into a 3-address one, sink it past the instruction that kills the read-mod-write register if its definition is used past the kill. This reduces the number of live register by one.
llvm-svn: 48333
2008-03-13 06:37:55 +00:00
Christopher Lamb
0f1c32eb63 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
2008-03-13 05:47:01 +00:00
Evan Cheng
6b57844f0c Remove unused options.
llvm-svn: 48319
2008-03-13 02:41:34 +00:00
Evan Cheng
b9fc5d6d07 Refactor some code out of MachineSink into a MachineInstr query.
llvm-svn: 48311
2008-03-13 00:44:09 +00:00
Evan Cheng
620fd19798 Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1028<def> = MOV32rr %EAX
        %reg1029<def> = MOV32rr %EDX
        %reg1030<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
        %reg1025<def> = MOV32rr %reg1029
        %reg1026<def> = MOV32rr %reg1030
        %reg1024<def> = MOV32rr %reg1028

The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.

With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1024<def> = MOV32rr %EAX
        %reg1025<def> = MOV32rr %EDX
        %reg1026<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]

Much better!

llvm-svn: 48307
2008-03-12 22:19:41 +00:00
Duncan Sands
f830ed681b Initial soft-float support for LegalizeTypes. I rewrote
the fcopysign expansion from LegalizeDAG to get rid of
what seems to be a bug: the use of sign extension means
that when copying the sign bit from an f32 to an f64,
the upper 32 bits of the f64 (now an i64) are set, not
just the top bit...  I also generalized it to work for
any sized floating point types, and removed the bogosity:
  SDOperand Mask1 = (SrcVT == MVT::f64)
    ? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT)
    : DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT);
  Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1);
(here SrcNVT is an integer with the same size as SrcVT).
As far as I can see this takes a 1 << 63, converts to
a double, converts that to a floating point constant
then converts that to an integer constant, ending up
with... 1 << 63 as an integer constant!  So I just
generate this integer constant directly.

llvm-svn: 48305
2008-03-12 21:27:04 +00:00
Dan Gohman
e40582180e Change VirtRegMap's dump to dump to cerr, not DOUT, so that it
can be called from within a debuger without having -debug specified
on the command-line.

llvm-svn: 48298
2008-03-12 20:52:10 +00:00
Dan Gohman
4e4f2e2ba4 Fix typos in comments.
llvm-svn: 48297
2008-03-12 20:50:04 +00:00
Duncan Sands
f9de87eae8 Fix typo.
llvm-svn: 48295
2008-03-12 20:35:19 +00:00
Duncan Sands
05eb212b2d Don't try to extract an i32 from an f64. This
getCopyToParts problem was noticed by the new
LegalizeTypes infrastructure.  In order to avoid
this kind of thing in the future I've added a
check that EXTRACT_ELEMENT is only used with
integers.  Once LegalizeTypes is up and running
most likely BUILD_PAIR and EXTRACT_ELEMENT can
be removed, in favour of using apints instead.

llvm-svn: 48294
2008-03-12 20:30:08 +00:00
Evan Cheng
df92afe7d3 Clean up my own mess.
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.

llvm-svn: 48279
2008-03-12 07:02:50 +00:00
Owen Anderson
df98435a16 We also need to collect the VN IDs for the PHI instructions for later updating.
llvm-svn: 48278
2008-03-12 04:22:57 +00:00
Owen Anderson
ecc3b561eb When we're determining what registers to coallesce, track the VNInfo IDs for the definitions that
feed the PHI instructions.  We'll need these IDs in order to update LiveIntervals properly.

llvm-svn: 48277
2008-03-12 03:13:29 +00:00
Evan Cheng
ee092b2dfc Total brain cramp.
llvm-svn: 48274
2008-03-12 02:05:05 +00:00
Evan Cheng
1812351f99 Set NextMII after issuing a physical register spill.
llvm-svn: 48263
2008-03-12 00:14:07 +00:00
Evan Cheng
909992f970 Minor debug output bug.
llvm-svn: 48261
2008-03-12 00:02:46 +00:00
Anton Korobeynikov
55f54ba252 Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
llvm-svn: 48257
2008-03-11 22:38:53 +00:00
Dan Gohman
8e3c88c4e9 Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.

llvm-svn: 48256
2008-03-11 22:29:46 +00:00
Anton Korobeynikov
aa1433ab47 Honour aliases visibility during asm emission
llvm-svn: 48249
2008-03-11 21:41:14 +00:00
Evan Cheng
665363494f Transfer physical register spill info when load / store folding happens.
llvm-svn: 48246
2008-03-11 21:34:46 +00:00
Dan Gohman
1fece90de9 Use the correct value for InSignBit.
llvm-svn: 48245
2008-03-11 21:29:43 +00:00
Dan Gohman
55a443d612 Initial codegen support for functions and calls with multiple return values.
llvm-svn: 48244
2008-03-11 21:11:25 +00:00
Christopher Lamb
74f4d837df Recommitting parts of r48130. These do not appear to cause the observed failures.
llvm-svn: 48223
2008-03-11 10:09:17 +00:00