Chris Lattner
ba7cdbebb1
add signed versions of the extra precision multiplies
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llvm-svn: 21106
2005-04-06 04:19:22 +00:00
Chris Lattner
34757ff939
Add rotate instructions.
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llvm-svn: 19690
2005-01-19 07:50:03 +00:00
Chris Lattner
9d5ee289d7
Improve coverage of the X86 instruction set by adding 16-bit shift doubles.
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llvm-svn: 19687
2005-01-19 07:31:24 +00:00
Chris Lattner
65d007ab62
Add conditional moves for the parity flag.
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llvm-svn: 19437
2005-01-10 22:09:33 +00:00
Chris Lattner
95f1e628ed
Add support for SETNPr to lower to memory form.
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llvm-svn: 19248
2005-01-02 02:37:46 +00:00
Chris Lattner
316f923a9c
Spill/restore X86 floating point stack registers with 64-bits of precision
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instead of 80-bits of precision. This fixes PR467.
This change speeds up fldry on X86 with LLC from 7.32s on apoc to 4.68s.
llvm-svn: 18433
2004-12-02 18:17:31 +00:00
Chris Lattner
acd213fba3
Add some new instructions. Fix the asm string for sbb32rr
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llvm-svn: 16759
2004-10-06 04:01:02 +00:00
Reid Spencer
c4abcbefb1
Changes For Bug 352
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Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
llvm-svn: 16137
2004-09-01 22:55:40 +00:00
Chris Lattner
4427fd9a3c
Reduce uses of getRegClass
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llvm-svn: 15973
2004-08-21 20:13:52 +00:00
Chris Lattner
555a585fd8
Code insertion methods now return void instead of an int.
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llvm-svn: 15780
2004-08-15 22:15:11 +00:00
Chris Lattner
e58190f5f6
These methods no longer take a TargetRegisterClass* operand.
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llvm-svn: 15774
2004-08-15 21:56:44 +00:00
Nate Begeman
fabece673b
Eliminate MachineFunction& argument from eliminateFrameIndex in x86 Target. Get MachineFunction from MachineInstruction's parent's parent
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llvm-svn: 15739
2004-08-14 22:05:10 +00:00
Chris Lattner
d7905d828b
Reserve the correct amt of space.
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llvm-svn: 14913
2004-07-17 20:24:05 +00:00
Chris Lattner
6331eb6bbe
Delete the allocate*TargetMachine function, which is now dead .
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The shared command line options are now in a header that makes sense.
llvm-svn: 14756
2004-07-11 04:17:10 +00:00
Reid Spencer
50ec3f9325
Add #include <iostream> since Value.h does not #include it any more.
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llvm-svn: 14622
2004-07-04 12:19:56 +00:00
Misha Brukman
e38f7ed2cc
Spell out `NoFramePointerElim' for readability.
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llvm-svn: 14299
2004-06-21 21:17:44 +00:00
Misha Brukman
a2ac4e4345
Use the common `NoFPElim' setting instead of our own.
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llvm-svn: 14298
2004-06-21 21:10:24 +00:00
Chris Lattner
0cd29ae2cd
Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()
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llvm-svn: 14201
2004-06-17 18:19:28 +00:00
Chris Lattner
4c8b57ea31
Add support for the setp instructions
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llvm-svn: 14140
2004-06-11 04:30:06 +00:00
Chris Lattner
5ad9eaab1a
Convert to the new TargetMachine interface.
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llvm-svn: 13952
2004-06-02 05:55:25 +00:00
Alkis Evlogimenos
20b074682c
Add more ADC and SBB variants
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llvm-svn: 12607
2004-04-02 07:11:10 +00:00
Chris Lattner
6c1dd729d3
Implement spill code folding for all of the conditional move instructions
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llvm-svn: 12554
2004-03-30 21:29:47 +00:00
Alkis Evlogimenos
2b94b048a9
Another API change to MRegisterInfo::foldMemoryOperand. Instead of a
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MachineBasicBlock::iterator take a MachineInstr*.
llvm-svn: 12392
2004-03-14 20:14:27 +00:00
Alkis Evlogimenos
ff9482b664
Change MRegisterInfo::foldMemoryOperand to return the folded
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instruction to make the API more flexible.
llvm-svn: 12386
2004-03-14 07:19:51 +00:00
Alkis Evlogimenos
65649a50e9
Add memory operand version of conditional move.
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llvm-svn: 12190
2004-03-07 03:19:11 +00:00
Alkis Evlogimenos
7ecfe0a839
A big X86 instruction rename. The instructions are renamed to make
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their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:
ADD8rr -> add, 8-bit register, 8-bit register
IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate
IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate
MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory
llvm-svn: 11995
2004-02-29 08:50:03 +00:00
Alkis Evlogimenos
6815402082
SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them
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to denote this fact.
llvm-svn: 11972
2004-02-28 23:46:44 +00:00
Alkis Evlogimenos
e8dac99a43
Floating point loads/stores act on memory operands. Rename them to
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denote this fact.
llvm-svn: 11971
2004-02-28 23:42:35 +00:00
Alkis Evlogimenos
6038a89025
Uncomment instructions that take both an immediate and a memory
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operand but their sizes differ.
llvm-svn: 11969
2004-02-28 22:06:59 +00:00
Alkis Evlogimenos
977dbaadf7
Do not generate instructions with mismatched memory/immediate sized
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operands. The X86 backend doesn't handle them properly right now.
llvm-svn: 11944
2004-02-28 06:01:43 +00:00
Alkis Evlogimenos
5ac109957f
Add memory operand folding support for the SETcc family of
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instructions.
llvm-svn: 11907
2004-02-27 16:13:37 +00:00
Alkis Evlogimenos
0742b93bb9
Add memory operand folding support for SHLD and SHRD instructions.
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llvm-svn: 11905
2004-02-27 15:03:18 +00:00
Alkis Evlogimenos
b1f67f6741
Add memory operand folding support for SHL, SHR and SAR, SHLD instructions.
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llvm-svn: 11903
2004-02-27 09:28:43 +00:00
Alkis Evlogimenos
7f7d70a53c
Move MOTy::UseType enum into MachineOperand. This eliminates the
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switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).
llvm-svn: 11715
2004-02-22 19:23:26 +00:00
Alkis Evlogimenos
6998610eda
When folding memory operands in machine instructions be careful to
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leave register operands with the same use/def flags as the original
instruction.
llvm-svn: 11709
2004-02-22 06:54:26 +00:00
Chris Lattner
f58d2dd6cf
Add support for GlobalAddress's for alkis
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llvm-svn: 11560
2004-02-17 18:23:55 +00:00
Alkis Evlogimenos
0528c59353
Instructiosn with 1 memory operand have 4 operands in our
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representation.. duh!
llvm-svn: 11554
2004-02-17 15:58:13 +00:00
Alkis Evlogimenos
b1a61b72f2
Align case statements.
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llvm-svn: 11552
2004-02-17 15:50:41 +00:00
Alkis Evlogimenos
b815fd46ec
Add TEST and XCHG memory operand support.
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llvm-svn: 11550
2004-02-17 15:48:42 +00:00
Alkis Evlogimenos
32a5b0fd6c
Add OR and XOR memory operand support.
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llvm-svn: 11549
2004-02-17 15:33:14 +00:00
Alkis Evlogimenos
135c4faa55
Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT,
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MOVSX, and MOVZX.
llvm-svn: 11546
2004-02-17 09:14:23 +00:00
Alkis Evlogimenos
e7bbd1c2fb
Add memory operand folding for CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32}
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and DECm{8,16,32} instructions.
llvm-svn: 11545
2004-02-17 08:49:20 +00:00
Alkis Evlogimenos
5aa39e1583
Add support for folding memory operands for ADC, SBB and SUB instructions.
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llvm-svn: 11541
2004-02-17 08:08:51 +00:00
Chris Lattner
eb1428d581
Add a (hidden) option to print instructions that fail to fuse. It's looking
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like compares and test's would be the next huge win...
llvm-svn: 11539
2004-02-17 08:03:47 +00:00
Alkis Evlogimenos
19248dd757
Add support for folding memory operands in MOVri{8,16,32} instructions.
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llvm-svn: 11538
2004-02-17 07:47:20 +00:00
Chris Lattner
a9493ad718
Add an option to disable spill fusing in the X86 backend
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llvm-svn: 11531
2004-02-17 06:30:34 +00:00
Chris Lattner
d4b2f4ef32
Fix the mneumonics for the mov instructions to have the source and destination
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order in the correct sense!! Arg!
llvm-svn: 11530
2004-02-17 06:28:19 +00:00
Chris Lattner
4682990fa5
GRRR. Move instructions have swapped the order of the r/m operands.
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llvm-svn: 11528
2004-02-17 06:20:20 +00:00
Chris Lattner
e227ae6b88
Change to match the newer, simpler, interface
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llvm-svn: 11525
2004-02-17 05:54:57 +00:00
Chris Lattner
b82bb37952
Add support for folding memory operands into AND and IMUL's
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llvm-svn: 11523
2004-02-17 05:46:06 +00:00