RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 04:22:57 +02:00
Code Issues Projects Releases Wiki Activity
106,538 Commits 4 Branches 5 Tags 704 MiB
4a2da5b0e2
Commit Graph

19 Commits

Author SHA1 Message Date
Amaury de la Vieuville
5a373a526e ARM: fix thumb1 nop decoding 
In thumb1, NOP is a pseudo-instruction equivalent to mov r8, r8.
However the disassembler should not use this alias.

llvm-svn: 184703
 2013-06-24 09:11:53 +00:00
Richard Barton
249de35aaa Disallow YIELD and other allocated nop hints in pre-ARMv6 architectures. 
llvm-svn: 155983
 2012-05-02 09:43:18 +00:00
Jim Grosbach
be94868d66 Thumb parsing and encoding support for NOP. 
The irony is not lost that this is not a completely trivial patchset.

llvm-svn: 138143
 2011-08-19 23:24:36 +00:00
Jim Grosbach
1cfe8c24d5 Tidy up formatting. 
llvm-svn: 137464
 2011-08-12 17:01:02 +00:00
Jim Grosbach
d3b15141b8 Fix predicates for Thumb co-processor instructions. 
They're all Thumb2 only, not just some of them. More refactoring cleanup
coming.

llvm-svn: 135081
 2011-07-13 21:14:23 +00:00
Bruno Cardoso Lopes
93eae0fd19 ARM asm parser wasn't able to parse a "mov" instruction while in Thumb 
mode (only the "mov.w" variant). Now, when parsing "mov" in thumb mode,
default to the Thumb 1 versions/encodings.

llvm-svn: 132233
 2011-05-27 23:46:09 +00:00
Owen Anderson
50766bc2f2 Fix encoding of Thumb BLX register instructions. Patch by Koan-Sin Tan. 
llvm-svn: 131189
 2011-05-11 17:00:48 +00:00
Bruno Cardoso Lopes
e65a98b127 Fix encoding and add parsing support for the arm/thumb CPS instruction: 
- Add custom operand matching for imod and iflags.
- Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC
  from mnemonic.
- While adding ".w" as an operand, don't change "Head" to avoid passing the
  wrong mnemonic to ParseOperand.
- Add asm parser tests.
- Add disassembler tests just to make sure it can catch all cps versions.

llvm-svn: 125489
 2011-02-14 13:09:44 +00:00
Bruno Cardoso Lopes
2d6bd03b18 fix the encoding and add testcases for ARM nop, yield, wfe and wfi instructions 
llvm-svn: 124288
 2011-01-26 13:28:14 +00:00
Bruno Cardoso Lopes
5f06c0aa3b Add cdp/cdp2 instructions for thumb/thumb2 
llvm-svn: 123929
 2011-01-20 18:32:09 +00:00
Bruno Cardoso Lopes
f377d1721e Add mcr* and mr*c support to thumb targets 
llvm-svn: 123917
 2011-01-20 16:35:57 +00:00
Bruno Cardoso Lopes
c1e21b06b9 Follow the current hack set and enable the correct parsing of bkpt while in thumb mode. 
llvm-svn: 123772
 2011-01-18 20:55:11 +00:00
Bill Wendling
ae920bcc50 Add parsing for the Thumb t_addrmode_s4 addressing mode. This can almost 
certainly be made more generic. But it does allow us to parse something like:

          ldr     r3, [r2, r4]

correctly in Thumb mode.

llvm-svn: 120408
 2010-11-30 07:44:32 +00:00
Bill Wendling
c0055893db Add more Thumb encodings. 
llvm-svn: 120279
 2010-11-29 01:07:48 +00:00
Bill Wendling
b54752da15 More Thumb encodings. 
llvm-svn: 120278
 2010-11-29 01:00:43 +00:00
Bill Wendling
8f0b624061 Add Thumb encodings for REV instructions. 
llvm-svn: 120277
 2010-11-29 00:42:50 +00:00
Bill Wendling
d233cab1eb Add more Thumb encodings. 
llvm-svn: 120272
 2010-11-29 00:18:15 +00:00
Bill Wendling
a472e7be70 Add encoding for ARM "trap" instruction. 
llvm-svn: 119938
 2010-11-21 11:05:29 +00:00
Bill Wendling
50a1812023 Add MC encodings for some Thumb instructions. Test for a few of them. The "bx 
lr" instruction cannot be tested just yet. It requires matching a "condition
code", but adding one of those makes things go south quickly...

llvm-svn: 119774
 2010-11-19 01:33:10 +00:00