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69286 Commits

Author SHA1 Message Date
Eric Christopher
4b361468c0 Have the SubtargetFeature help routine just not return a number and
fall back to the normal path without a cpu. While doing this fix
llc to just exit when we don't have a module to process instead of
asserting.

llvm-svn: 208102
2014-05-06 16:29:50 +00:00
Rafael Espindola
4e41e774ce Be more strict about not allowing setSection on aliases.
llvm-svn: 208095
2014-05-06 14:59:14 +00:00
Rafael Espindola
6fba05577d Be more strict about not calling setAlignment on global aliases.
The fact that GlobalAlias::setAlignment exists at all is a side effect of
how the classes are organized, it should never be used.

llvm-svn: 208094
2014-05-06 14:51:36 +00:00
Tim Northover
c3dfe08427 AArch64/ARM64: implement diagnosis of unpredictable loads & stores
llvm-svn: 208091
2014-05-06 14:15:14 +00:00
Tim Northover
46970c8884 AArch64/ARM64: make NEON vector list parsing a bit more robust
It doesn't change the results, but it seems silly not to diagnose obvious
problems early on.

llvm-svn: 208083
2014-05-06 12:50:51 +00:00
Tim Northover
5494085a1f AArch64/ARM64: add more specific diagnostic for floating imm 0.0.
llvm-svn: 208082
2014-05-06 12:50:47 +00:00
Tim Northover
3d47129ce2 AArch64/ARM64: add more specific diagnostic for invalid vector lanes
llvm-svn: 208081
2014-05-06 12:50:44 +00:00
Tim Northover
fab515c3bb AArch64/ARM64: produce more informative diagnostic assembling some immediates
No tests here, they'll be added when the entire neon-diagnostics.s test from
AArch64 is enabled.

llvm-svn: 208079
2014-05-06 11:18:53 +00:00
Christian Pirker
20a4e2bc33 ARM: For thumb fixups store halfwords high first and low second
llvm-svn: 208076
2014-05-06 10:05:11 +00:00
Kevin Qin
7464b14156 [ARM64] Enable alignment control option in front-end for ARM64.
This is the modification in llvm part.

llvm-svn: 208074
2014-05-06 09:48:52 +00:00
Craig Topper
659167eb76 Use X86 memory operand enums instead of hardcoding.
llvm-svn: 208064
2014-05-06 07:04:32 +00:00
David Blaikie
3cd962a2b9 PR19598: Provide the ability to RAUW a declaration with itself, creating a non-temporary copy and using that to RAUW.
Also, provide the ability to create temporary and non-temporary
declarations, as not all declarations may be replaced by definitions
later on.

This provides the necessary infrastructure for Clang to fix PR19598,
leaking temporary MDNodes in Clang's debug info generation.

llvm-svn: 208054
2014-05-06 03:41:57 +00:00
Eric Christopher
dd5ab2d0fd Revert "Walk back commits for unused function parameters - they're still being"
this reapplies 208012 and 208002.

llvm-svn: 208037
2014-05-06 02:37:26 +00:00
Duncan P. N. Exon Smith
cbf47b5244 blockfreq: Move include to .cpp
llvm-svn: 208035
2014-05-06 01:57:42 +00:00
Richard Smith
55381ccf0a Re-commit r208025, reverted in r208030, with a fix for a conformance issue
which GCC detects and Clang does not!

llvm-svn: 208033
2014-05-06 01:44:26 +00:00
Richard Smith
b38145eb67 Revert r208025, which made buildbots unhappy for unknown reasons.
llvm-svn: 208030
2014-05-06 01:26:00 +00:00
Reid Kleckner
3d55680273 Fix i128 div/mod on mingw64
The Win64 docs are very clear that anything larger than 8 bytes is
passed by reference, and GCC MinGW64 honors that for __modti3 and
friends.

Patch by Jameson Nash!

llvm-svn: 208029
2014-05-06 01:20:42 +00:00
Argyrios Kyrtzidis
99abb688e5 [Support/MemoryBuffer] Rename IsVolatile -> IsVolatileSize and add a comment about the use case for the new parameter.
llvm-svn: 208026
2014-05-06 01:03:52 +00:00
Richard Smith
e9d2d57a7c Add llvm::function_ref (and a couple of uses of it), representing a type-erased reference to a callable object.
llvm-svn: 208025
2014-05-06 01:01:29 +00:00
Reid Kleckner
30c9a2d02a Include intrin.h before windows.h as a workaround for the x64 self-host
On x64, windows.h doesn't include intrin.h for intrinsics.  It just
declares them in the global namespace and uses them, expecting the
compiler to lower it as a builtin.  We basically need to do this in
clang, eventually.

llvm-svn: 208023
2014-05-06 00:57:33 +00:00
Argyrios Kyrtzidis
4c9d588352 [Support/MemoryBuffer] Move the IsVolatile check inside shouldUseMmap() and make sure to zero-initialize the rest
of the buffer if we unexpectedly reach end-of-file while reading.

llvm-svn: 208021
2014-05-06 00:51:45 +00:00
Nick Lewycky
75f47267ef Detabify.
llvm-svn: 208019
2014-05-06 00:46:20 +00:00
Nick Lewycky
d7c0e22d5f Improve 'tail' call marking in TRE. A bootstrap of clang goes from 375k calls marked tail in the IR to 470k, however this improvement does not carry into an improvement of the call/jmp ratio on x86. The most common pattern is a tail call + br to a block with nothing but a 'ret'.
The number of tail call to loop conversions remains the same (1618 by my count).

The new algorithm does a local scan over the use-def chains to identify local "alloca-derived" values, as well as points where the alloca could escape. Then, a visit over the CFG marks blocks as being before or after the allocas have escaped, and annotates the calls accordingly.

llvm-svn: 208017
2014-05-05 23:59:03 +00:00
Eric Christopher
aca3da86bc Walk back commits for unused function parameters - they're still being
used via dragonegg for now.

llvm-svn: 208016
2014-05-05 23:26:59 +00:00
Yi Jiang
8e66fa3904 Reapply: Add slp vectorization to LTO passes. The bug it exposed has been fixed by r207983. <radar://16641956>
llvm-svn: 208013
2014-05-05 23:14:46 +00:00
Eric Christopher
e0b6ecc84d Remove a now unnecessary function since all calls have one version
and inline it into its caller.

llvm-svn: 208012
2014-05-05 22:36:07 +00:00
Eric Christopher
6723e945a9 Remove a call to std::exit in a library. Make "Help" return
a 0 as a default answer.

llvm-svn: 208009
2014-05-05 22:01:47 +00:00
Argyrios Kyrtzidis
81db8ad5a3 [Support/MemoryBuffer] Introduce a boolean parameter (false by default) 'IsVolatile' for the open file functions.
This provides a hint that the file may be changing often so mmap is avoided.

llvm-svn: 208007
2014-05-05 21:55:51 +00:00
Eric Christopher
e5222b0f5a Fix typo.
llvm-svn: 208006
2014-05-05 21:50:57 +00:00
Tom Stellard
1291d8f8c2 R600: Expand i64 ISD:SUB
llvm-svn: 208005
2014-05-05 21:47:15 +00:00
Eric Christopher
bc51107137 Remove unused argument from AddFeature.
llvm-svn: 208002
2014-05-05 21:40:44 +00:00
Rafael Espindola
f744fd3ef9 Use a range loop.
llvm-svn: 207996
2014-05-05 20:06:41 +00:00
Filipe Cabecinhas
cccfa360ce Revert "Optimize shufflevector that copies an i64/f64 and zeros the rest."
This reverts commit 207992. I misread the phab number on the LGTM.

llvm-svn: 207993
2014-05-05 19:40:36 +00:00
Filipe Cabecinhas
912c9dd1fe Optimize shufflevector that copies an i64/f64 and zeros the rest.
Summary:
Also ran clang-format on the function. The code added is the last else
if block.

Reviewers: nadav, craig.topper

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3518

llvm-svn: 207992
2014-05-05 19:36:28 +00:00
Marek Olsak
6fa0778eff R600/SI: allow 5 more input SGPRs to a shader
Our OpenGL driver needs 22 SGPRs (16 user SGPRs + 6 streamout non-user SGPRs).

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
llvm-svn: 207990
2014-05-05 19:30:54 +00:00
Yi Jiang
86dccb7e97 Always set alignment of vectorized LD/ST in SLP-Vectorizer. <rdar://problem/16812145>
llvm-svn: 207983
2014-05-05 17:59:14 +00:00
Duncan P. N. Exon Smith
a7513de2e4 LTO: -internalize sets visibility to default
Visibility is meaningless when the linkage is local.  Change
`-internalize` to reset the visibility to `default`.

<rdar://problem/16141113>

llvm-svn: 207979
2014-05-05 17:40:44 +00:00
Kaelyn Takata
5b23e5bb46 Select bdver2 instead of bdver1 if TBM support is present on models < 0x10.
Tested that the right -target-cpu is set in the clang -cc1 command line
when running "clang -march=native -E -v - </dev/null" on both an FX-8150
and an FX-8350. Both are family 15h; the FX-8150 (Bulldozer processor)
reports a model number of 1, and the FX-8350 (Piledriver processor)
reports a model number of 2.

llvm-svn: 207973
2014-05-05 16:32:10 +00:00
Timur Iskhodzhanov
16ebb61afc [ASan/Win] Fix issue 305 -- don't instrument .CRT initializer/terminator callbacks
See https://code.google.com/p/address-sanitizer/issues/detail?id=305
Reviewed at http://reviews.llvm.org/D3607

llvm-svn: 207968
2014-05-05 14:28:38 +00:00
Rafael Espindola
3f55efbe16 Trivial simplification. No functionality change.
llvm-svn: 207967
2014-05-05 14:18:16 +00:00
Saleem Abdulrasool
45ef2e0451 CodeGen: correct memset emittance for WoA
Windows on ARM does not conform to AEABI.  However, memset would be emitted
using the AEABI signature, resulting in inverted parameters.  Handle this
special case appropriately.

llvm-svn: 207943
2014-05-04 23:13:21 +00:00
Saleem Abdulrasool
bca668b81f MC: support FK_SecRel_4 for Windows on ARM
Add handling for FK_SecRel_4 (4-byte section relative relocations).  These are
used by the generation of DWARF debug information (the abbrevations use section
relative relocations).  This will also be used in generation of CodeView line
tables.

llvm-svn: 207941
2014-05-04 23:13:15 +00:00
Benjamin Kramer
8125aa2cd4 LoopUnroll: If we're doing partial unrolling, use the PartialThreshold to limit unrolling.
Otherwise we use the same threshold as for complete unrolling, which is
way too high. This made us unroll any loop smaller than 150 instructions
by 8 times, but only if someone specified -march=core2 or better,
which happens to be the default on darwin.

llvm-svn: 207940
2014-05-04 19:12:38 +00:00
Arnold Schwaighofer
d752a09f8b SLPVectorizer: Bring back the insertelement patch (r205965) with fixes
When can't assume a vectorized tree is rooted in an instruction. The IRBuilder
could have constant folded it. When we rebuild the build_vector (the series of
InsertElement instructions) use the last original InsertElement instruction. The
vectorized tree root is guaranteed to be before it.

Also, we can't assume that the n-th InsertElement inserts the n-th element into
a vector.

This reverts r207746 which reverted the revert of the revert of r205018 or so.

Fixes the test case in PR19621.

llvm-svn: 207939
2014-05-04 17:10:15 +00:00
Elena Demikhovsky
52b1f22e9c AVX-512: minor change in rndscale intrinsic
llvm-svn: 207937
2014-05-04 13:35:37 +00:00
Chandler Carruth
2ccafe8399 [LCG] Add the last (and most complex) of the edge insertion mutation
operations on the call graph. This one forms a cycle, and while not as
complex as removing an internal edge from an SCC, it involves
a reasonable amount of work to find all of the nodes newly connected in
a cycle.

Also somewhat alarming is the worst case complexity here: it might have
to walk roughly the entire SCC inverse DAG to insert a single edge. This
is carefully documented in the API (I hope).

llvm-svn: 207935
2014-05-04 09:38:32 +00:00
Saleem Abdulrasool
d9cd5486e9 X86: further range-loopify AsmPrinter
Use more range loops in the X86AsmPrinter.  NFC.

llvm-svn: 207928
2014-05-04 01:54:17 +00:00
Saleem Abdulrasool
53f4c01738 X86: remove X86COFFMachineModuleInfo
Remove dead code.  This is vestigial after r98384.

llvm-svn: 207927
2014-05-04 01:54:12 +00:00
Saleem Abdulrasool
edfd1818df X86: repair export compatibility with MinGW/cygwin
Both MinGW and cygwin (i686) construct export directives without the global
leader prefix.  This is mostly due to the fact that they use GNU ld which does
not correctly handle the export directive.  This apparently has been been broken
for a while.  However, this was recently reported as being broken by
mingwandroid and diorcety of the msys2 project.

Remove the global leader prefix if targeting MinGW or cygwin, otherwise, retain
the global leader prefix.  Add an explicit test for cygwin's behaviour of export
directives.

llvm-svn: 207926
2014-05-04 00:03:48 +00:00
Saleem Abdulrasool
f061e56242 X86: refactor export directive generation
Create a helper function to generate the export directive.  This was previously
duplicated inline to handle export directives for variables and functions.  This
also enables the use of range-based iterators for the generation of the
directive rather than the traditional loops.  NFC.

llvm-svn: 207925
2014-05-04 00:03:41 +00:00