Anton Korobeynikov
17529667db
Add missed pattern
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llvm-svn: 80502
2009-08-30 19:06:39 +00:00
Anton Korobeynikov
a261afbf14
EXTRACT_VECTOR_ELEMENT can have result type different from element type.
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Remove the assertion and generalize the code for ARM NEON stuff.
llvm-svn: 80498
2009-08-30 17:14:54 +00:00
Dan Gohman
f7b76078bb
CMOV_GR8 clobbers EFLAGS when its expansion involves an xor to set
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a register to 0. This fixes PR4814.
llvm-svn: 80445
2009-08-29 22:19:15 +00:00
Anton Korobeynikov
b2e6f5eed4
Do not assert on too wide splats we don't support.
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llvm-svn: 80409
2009-08-29 00:08:18 +00:00
Anton Korobeynikov
9fd6082c10
Add missed extract_element pattern
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llvm-svn: 80408
2009-08-28 23:41:26 +00:00
Evan Cheng
d7a07ab112
Let Darwin linker auto-synthesize stubs and lazy-pointers. This deletes a bunch of nasty code in ARM asm printer.
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llvm-svn: 80404
2009-08-28 23:18:09 +00:00
Evan Cheng
2d5d3700e9
v4, v5 does not support sxtb / sxth.
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llvm-svn: 80322
2009-08-28 00:31:43 +00:00
Anton Korobeynikov
cb0fdc4505
scalar_to_vector is fully legal now (implemented as subreg accesses)
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llvm-svn: 80249
2009-08-27 16:04:47 +00:00
Anton Korobeynikov
e17a92c545
Ok, sometimes it's profitable to turn scalar_to_vector stuff into subreg access.
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Add a testcase.
llvm-svn: 80246
2009-08-27 14:51:42 +00:00
Evan Cheng
984f8efcaa
Fix PR4789. Teach eliminateFrameIndex how to handle VLDRQ and VSTRQ which cannot fold any immediate offset.
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llvm-svn: 80191
2009-08-27 01:23:50 +00:00
Dan Gohman
60fae1b2a2
X86FastISel support for loading and storing values of type i1.
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llvm-svn: 80186
2009-08-27 00:31:47 +00:00
Dan Gohman
613d152216
Expand i8 selects into control flow instead of 16-bit conditional
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moves. This avoids the need to promote the operands (or implicitly
extend them, a partial register update condition), and can reduce
i8 register pressure. This substantially speeds up code such as
write_hex in lib/Support/raw_ostream.cpp.
subclass-coalesce.ll is too trivial and no longer tests what it was
originally intended to test.
llvm-svn: 80184
2009-08-27 00:14:12 +00:00
Bob Wilson
c7d92cfb15
Convert some more Neon tests to FileCheck.
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llvm-svn: 80120
2009-08-26 18:11:50 +00:00
Dale Johannesen
ca67bcd630
Alter 79292 to produce output that actually assembles.
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llvm-svn: 80119
2009-08-26 18:10:32 +00:00
Anton Korobeynikov
1c904039ce
Expand scalar_to_vector - we don't have any isel logic for it now
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llvm-svn: 80107
2009-08-26 16:26:09 +00:00
Dan Gohman
6bd4a58365
Don't use INSERT_SUBREG to model anyext operations on x86-64, as it
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leads to partial-register definitions. To help avoid redundant
zero-extensions, also teach the h-register matching patterns that
use movzbl to match anyext as well as zext.
llvm-svn: 80099
2009-08-26 14:59:13 +00:00
Anton Korobeynikov
6ee3a73ba1
Add dummy inline asm handling for 'r' constraint. This fixes PR4778
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llvm-svn: 80085
2009-08-26 13:44:29 +00:00
Scott Michel
d9d9c7ef05
Updated i128 sext support for CellSPU backend, contributed by Ken Werner (IBM)
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llvm-svn: 80042
2009-08-25 22:37:34 +00:00
Chris Lattner
8d793c7b81
remove some dead lines.
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llvm-svn: 80031
2009-08-25 21:01:56 +00:00
Chris Lattner
102e6780cf
convert to filecheck style
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llvm-svn: 80029
2009-08-25 20:57:38 +00:00
Chris Lattner
70bb855eb0
convert to filecheck
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llvm-svn: 80025
2009-08-25 20:49:04 +00:00
Daniel Dunbar
e3e4e68583
Switch abi-isel.ll to FileCheck; it's not much faster, but it now tests a lot
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more and is much nicer to the OS.
- Dan, please check. If there are parts of the test you think I should strip
out so it doesn't cause random failures let me know (there are still some PIC
label numbers in it, for example).
llvm-svn: 80019
2009-08-25 18:45:03 +00:00
David Goodwin
047f69da86
Fixup register kills after scheduling.
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llvm-svn: 80002
2009-08-25 17:03:05 +00:00
Anton Korobeynikov
b388728ba7
Provide dynamic_stackalloc lowering for MSP430.
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This fixes PR4769
llvm-svn: 80001
2009-08-25 17:00:23 +00:00
Dan Gohman
bf08e82d8e
Remove obsolete -f flags.
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llvm-svn: 79992
2009-08-25 15:38:29 +00:00
Dale Johannesen
b8888477db
Fix PR 4751, another difficulty with %a modifier on x86.
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llvm-svn: 79961
2009-08-25 00:16:14 +00:00
Scott Michel
ad0e6ad80f
- Remove SelectSEXTi128 from SPUISelDAGToDAG.cpp, evidently, this is redundant
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code, according to Anton (I'm not totally convinced, but we can always
resurrect patches if we need to do so.)
- Start moving CellSPU's tests to prefer FileCheck.
llvm-svn: 79958
2009-08-24 23:57:35 +00:00
Scott Michel
3444be8f21
Prefer 'FileCheck' over 'grep'.
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llvm-svn: 79953
2009-08-24 22:49:22 +00:00
Scott Michel
ee51c50e21
128-bit sign extension and vector shift cleanups, contributed by Ken Werner
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(IBM).
llvm-svn: 79949
2009-08-24 22:28:53 +00:00
Bob Wilson
af26d40dc0
Fix a typo. Somehow I thought this had passed before, but I guess not.
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llvm-svn: 79937
2009-08-24 21:17:17 +00:00
Bob Wilson
fadb065745
Convert slow test to use FileCheck.
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llvm-svn: 79935
2009-08-24 20:33:47 +00:00
Daniel Dunbar
60ce8bad43
Convert two gratuitous abuses of poor helpless CPU cycles to FileCheck.
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llvm-svn: 79933
2009-08-24 20:08:27 +00:00
Dale Johannesen
add8a314dd
Split test into 3.
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llvm-svn: 79926
2009-08-24 17:51:19 +00:00
Dale Johannesen
3a5e5c7edd
Make linkerprivate work for ARM and PPC. Testcase covers
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all Darwin targets; could be split into separate tests for
the chip subdirectories, but from Chris' last mail on testing
I assume he'd rather have only one test. Generic seems to be
the best available, maybe there should be a Darwin subdirectory?
llvm-svn: 79877
2009-08-24 01:03:42 +00:00
Daniel Dunbar
cb45f3cb4a
Rerevert (r75663 and r76805), seems there is more non-determinism.
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llvm-svn: 79856
2009-08-23 17:26:24 +00:00
Jakob Stoklund Olesen
291647e0d9
Fix PR4753.
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When undoing a reuse in ReuseInfo::GetRegForReload, check if it was only a
sub-register being used. The MachineOperand::getSubReg() method is only valid
for virtual registers, so we have to recover the sub-register index manually.
llvm-svn: 79855
2009-08-23 13:01:45 +00:00
Daniel Dunbar
f2e39b8c6d
Speculatively revert r76823 (i.e., reapply r75663 and r76805) to see if the real
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problem is fixed by the TableGen determinism fix.
llvm-svn: 79851
2009-08-23 10:44:51 +00:00
Eli Friedman
79615641f1
Make x86 test actually test x86 code generation. Fix the
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construct on ARM, which was breaking by coincidence, and add a similar
testcase for ARM.
llvm-svn: 79719
2009-08-22 03:13:10 +00:00
Chris Lattner
cf54f19140
rename test, make more specific.
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llvm-svn: 79712
2009-08-22 00:44:24 +00:00
Anton Korobeynikov
0fe74b95a5
Add missing RUN line
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llvm-svn: 79707
2009-08-22 00:28:50 +00:00
Anton Korobeynikov
833c9c6163
Reduce the test
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llvm-svn: 79703
2009-08-22 00:18:11 +00:00
Bob Wilson
79c0af15d0
Use CHECK-NEXT to make sure we're only getting one copy of each shuffle
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instruction.
llvm-svn: 79702
2009-08-22 00:13:23 +00:00
Bob Wilson
6d4400e852
Match VTRN, VZIP, and VUZP shuffles. Restore the tests for these operations,
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now using shuffles instead of intrinsics.
llvm-svn: 79673
2009-08-21 20:54:19 +00:00
Anton Korobeynikov
9458a8c84d
Add fcopysign instructions
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llvm-svn: 79664
2009-08-21 20:02:37 +00:00
Anton Korobeynikov
a706ea5720
Handle 'r' inline asm constraint
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llvm-svn: 79648
2009-08-21 18:15:41 +00:00
Bob Wilson
0da4ec0046
Add some tests for vext.16 and vext.32.
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llvm-svn: 79638
2009-08-21 16:35:24 +00:00
Bob Wilson
c046b62f1a
Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these as
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vector shuffles. Temporarily remove the tests for these operations until the
new implementation is working.
llvm-svn: 79579
2009-08-21 00:01:42 +00:00
Dale Johannesen
f6b2759c5e
Use FileCheck even though this means testing for something
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that has nothing to do with the point of the test, per Chris.
llvm-svn: 79569
2009-08-20 22:12:08 +00:00
Dan Gohman
f2f57ebc84
Fix an x86 code size regression: prefer RIP-relative addressing
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over absolute addressing even in non-PIC mode (unless the address
has an index or something else incompatible), because it has a
smaller encoding.
llvm-svn: 79553
2009-08-20 18:23:44 +00:00
Evan Cheng
86546fb692
Fix an obvious copy-n-paste bug.
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llvm-svn: 79535
2009-08-20 17:01:04 +00:00