Craig Topper
f2a9bd3a4a
Add intrinsics and feature flag for read/write FS/GS base instructions. Also add AVX2 feature flag.
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llvm-svn: 143319
2011-10-30 19:57:21 +00:00
Kevin Enderby
837c1d56a2
Change the sysexit mnemonic (and sysexitl) to never have the REX.W prefix and
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not depend on In32BitMode. Use the sysexitq mnemonic for the version with the
REX.W prefix and only allow it only In64BitMode. rdar://9738584
llvm-svn: 143112
2011-10-27 17:40:41 +00:00
Craig Topper
91b4292682
Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMREAD, and VMWRITE to remove hack from X86RecognizableInstr.
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llvm-svn: 142117
2011-10-16 07:05:40 +00:00
Craig Topper
761bf0e7d3
Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE.
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llvm-svn: 141358
2011-10-07 07:02:24 +00:00
Craig Topper
71e09ffe7b
Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT.
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llvm-svn: 141354
2011-10-07 05:53:50 +00:00
Craig Topper
95f048d1ff
Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960
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llvm-svn: 140299
2011-09-22 07:01:50 +00:00
Joerg Sonnenberger
708b6e085d
Recognize the xstorerng alias for VIA PadLock's xstore instruction.
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llvm-svn: 134126
2011-06-30 01:38:03 +00:00
Chris Lattner
b9b420d588
fix rdar://8735979 - "int 3" doesn't match to "int3". Unfortunately,
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InstAlias doesn't allow matching immediate operands, so we have to write
C++ code to do this.
llvm-svn: 129223
2011-04-09 19:41:05 +00:00
Joerg Sonnenberger
1cbd300346
Add support for the VIA PadLock instructions.
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llvm-svn: 128826
2011-04-04 16:58:13 +00:00
Eli Friedman
be07c34368
PR9377: Handle x86 str with register operand in a way consistent with gas.
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llvm-svn: 126970
2011-03-04 00:10:17 +00:00
Rafael Espindola
e4a04cce2b
Implement xgetbv and xsetbv.
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Patch by Jai Menon.
llvm-svn: 126165
2011-02-22 00:35:18 +00:00
Kevin Enderby
a53cc6a764
Added the x86 instruction ud2b (2nd official undefined instruction).
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llvm-svn: 117485
2010-10-27 20:46:49 +00:00
Andrew Trick
b9e8700beb
Reverting r117031 to cleanup valgrind errors.
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It doesn't look like anything is wrong with the checkin,
but the new test cases expose a mem bug in AsmParser.
llvm-svn: 117087
2010-10-22 03:58:29 +00:00
Kevin Enderby
c63105a064
More tweaks to X86 instructions to allow the 'w' suffix in places it makes
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sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler allows
for these instructions. Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).
llvm-svn: 117031
2010-10-21 17:16:46 +00:00
Kevin Enderby
8a3030c6af
Added a few tweaks to the Intel Descriptor-table support instructions to allow
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word forms and suffixed versions to match the darwin assembler in 32-bit and
64-bit modes. This is again for use just with assembly source for llvm-mc .
llvm-svn: 116773
2010-10-19 00:01:44 +00:00
Chris Lattner
e63d763713
move the atomic pseudo instructions out to X86InstrCompiler.td
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llvm-svn: 115599
2010-10-05 06:22:35 +00:00
Chris Lattner
5f59acddbc
continue moving stuff out to X86InstrSystem.td. Move
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control flow stuff out to X86InstrControl.td. Move
some compiler pseudo instructions and Pat<> patterns
out to X86InstrCompiler.td
llvm-svn: 115596
2010-10-05 06:04:14 +00:00
Chris Lattner
db65ba5acf
refactor .td files a bit, moving system instructions out to X86InstrSystem.td
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llvm-svn: 115591
2010-10-05 05:32:15 +00:00
