2 Commits

Author	SHA1	Message	Date
Craig Topper	11f57fde4f	[X86] Remove two feature flags that covered sets of instructions that have no patterns or intrinsics. Since we don't check feature flags in the assembler parser for any instruction sets, these flags don't provide any value. This frees up 2 of the fully utilized feature flags. ... llvm-svn: 228282	2015-02-05 08:51:02 +00:00
Kevin Enderby	0615385ba4	Add support for the X86 secure guard extensions instructions in assembler (SGX). ... This allows assembling the two new instructions, encls and enclu for the SKX processor model. Note the diffs are a bigger than what might think, but to fit the new MRM_CF and MRM_D7 in things in the right places things had to be renumbered and shuffled down causing a bit more diffs. rdar://16228228 llvm-svn: 214460	2014-07-31 23:57:38 +00:00