Nate Begeman
f2d22dbd9b
Fix JIT encoding of ppc mfocrf instruction; the operands were reversed
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llvm-svn: 22707
2005-08-08 20:04:52 +00:00
Chris Lattner
e6f861f92c
switch over the rest of the formats that use RC to use isDOT
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llvm-svn: 21352
2005-04-19 05:21:30 +00:00
Chris Lattner
082ca8fcab
Convert the XForm instrs and XSForm instruction over to use isDOT
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llvm-svn: 21351
2005-04-19 05:15:18 +00:00
Chris Lattner
3fdfd4e009
Now that the ppc64 and vmx operands of I are always 0, forward substitute
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them away.
llvm-svn: 21350
2005-04-19 05:05:22 +00:00
Chris Lattner
e6f7713f03
convert over bform and iform instructions
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llvm-svn: 21349
2005-04-19 05:00:59 +00:00
Chris Lattner
3ae0832381
Convert over DForm and DSForm instructions
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llvm-svn: 21348
2005-04-19 04:59:28 +00:00
Chris Lattner
4ecf523af4
Convert XLForm and XForm instructions over to use PPC64 when appropriate.
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llvm-svn: 21347
2005-04-19 04:51:30 +00:00
Chris Lattner
6a2abe8591
Convert XO XS and XFX forms to use isPPC64
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llvm-svn: 21346
2005-04-19 04:40:07 +00:00
Chris Lattner
3cfa7a24cb
Turn PPC64 and VMX into classes that can be added to instructions instead of
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bits that must be passed up the inheritance hierarchy. Convert MForm and AForm
instructions over
llvm-svn: 21345
2005-04-19 04:32:54 +00:00
Nate Begeman
85cd65b389
Change codegen for setcc to read the bit directly out of the condition
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register. Added support in the .td file for the g5-specific variant
of cr -> gpr moves that executes faster, but we currently don't
generate it.
llvm-svn: 21314
2005-04-18 02:43:24 +00:00
Nate Begeman
b707ec16b4
Add the necessary support to codegen condition register logical ops with
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register allocated condition registers. Make sure that the printed
output is gas compatible.
llvm-svn: 21295
2005-04-14 03:20:38 +00:00
Nate Begeman
f96b42f1b6
Initial support for allocation condition registers
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llvm-svn: 21246
2005-04-12 07:04:16 +00:00
Chris Lattner
7d11f40ee2
Revert the previous patch, which I didn't mean to check in.
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llvm-svn: 21226
2005-04-11 15:03:41 +00:00
Chris Lattner
d925c74452
Fix a minor bug (ORo didn't mark that it set CR0).
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Refactor how . instructions are handled. In particular, instead of passing
the RC flag all the way up the inheritance hierarchy, just make a new tblgen
class 'DOT' which can be added to an instruction definition.
For example, instead of this:
-def AND : XForm_6<31, 28, 0, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
-let Defs = [CR0] in
-def ANDo : XForm_6<31, 28, 1, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
- "and. $rA, $rS, $rB">;
We now have this:
+def AND : XForm_6<31, 28, 0, 0, (ops GPRC:$rA, GPRC:$rS, GPRC:$rB),
"and $rA, $rS, $rB">;
llvm-svn: 21225
2005-04-11 15:01:39 +00:00
Chris Lattner
671d625e17
Fix encoding of fsel, fixing olden/power, McCat/bisort and several others.
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All of Olden passes now! :)
llvm-svn: 18227
2004-11-25 04:11:07 +00:00
Chris Lattner
1a5a39e9ec
Fix encoding of swari, fixing several programs, including Olden/mst
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llvm-svn: 18225
2004-11-25 03:40:20 +00:00
Chris Lattner
de6bb17359
Fix a few more tests by encoding the extsb and other XForm11 instructions
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correctly.
llvm-svn: 18200
2004-11-24 03:52:02 +00:00
Chris Lattner
338b1b4634
Fix the encoding of ORi and other DForm4 instructions. This brings us to
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36/42 SingleSource/UnitTests passing!
llvm-svn: 18199
2004-11-24 02:15:41 +00:00
Chris Lattner
a8184a2882
Branch instructions explicitly represent CRx in them. bEcause of this, encode
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them explicitly as well.
llvm-svn: 18193
2004-11-24 01:15:19 +00:00
Chris Lattner
08eb9d0d18
Fix the encoding of OR, AND and many other instructions
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llvm-svn: 18174
2004-11-23 21:17:35 +00:00
Chris Lattner
04a25df638
Remove argtype and argcount magic, which was used by the old asmprinter.
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llvm-svn: 18170
2004-11-23 20:41:34 +00:00
Chris Lattner
88fcda18b8
Fix encoding of rlwinm?
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llvm-svn: 18165
2004-11-23 19:23:32 +00:00
Misha Brukman
bd6a01c3ef
DForm_1, particularly used by store instructions, needs the immediate operand to
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be listed second as that is how the instructions are usually created (and is the
correct asm syntax) so that it's assembled correctly from its constituents
llvm-svn: 17183
2004-10-23 06:08:38 +00:00
Misha Brukman
5e8bfd0675
There is only one field in an instruction, and that is `Inst', the final view of
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the instruction binary format, all others are simply operands and should not
have the `field' label
llvm-svn: 16978
2004-10-14 05:55:37 +00:00
Nate Begeman
e816600b3e
All PPC instructions are now auto-printed
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32 and 64 bit AsmWriters unified
Darwin and AIX specific features of AsmWriter split out
llvm-svn: 16163
2004-09-04 05:00:00 +00:00
Nate Begeman
3bad485eec
Convert remaining X-Form and Pseudo instructions over to asm writer
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llvm-svn: 16142
2004-09-02 08:13:00 +00:00
Nate Begeman
220175aa4d
convert M and MD form instructions to generated asm writer
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llvm-svn: 16121
2004-08-31 02:28:08 +00:00
Nate Begeman
e58512a61c
Move yet more instructions over to being printed by the generated asm writer
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llvm-svn: 16112
2004-08-30 02:28:06 +00:00
Nate Begeman
7792aa1f8b
Convert A-Form instructions to auto-generated asm writer
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llvm-svn: 16107
2004-08-29 22:45:13 +00:00
Nate Begeman
dd700ce5e4
Move XForm instructions over to the auto-generated asm writer
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llvm-svn: 15962
2004-08-21 05:56:39 +00:00
Chris Lattner
6ddb5d6c76
Convert all of the DForm_6* operations, which makes all of the Zimm16 users
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dead.
llvm-svn: 15754
2004-08-15 05:46:14 +00:00
Chris Lattner
41839ea5cd
Convert the DForm_4 over to the asmprintergen
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llvm-svn: 15751
2004-08-15 05:20:16 +00:00
Nate Begeman
48359fbcd0
Add some more 64 bit instructions we need for the PowerPC-64 ISel to the tablegen files
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llvm-svn: 15710
2004-08-13 02:19:26 +00:00
Misha Brukman
08b8a09113
Add support for 64-bit CMPDI, CMPLDI, and CMPLD opcodes
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llvm-svn: 15667
2004-08-11 20:56:14 +00:00
Misha Brukman
7325a6c790
Add doubleword load/store (64-bit only).
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llvm-svn: 15665
2004-08-11 15:54:36 +00:00
Misha Brukman
3f79fbe93f
Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targets
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llvm-svn: 15631
2004-08-10 22:47:03 +00:00
Misha Brukman
861d6cdcb1
DForm 5/6 extended mneumonics take 3 arguments.
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llvm-svn: 15620
2004-08-10 19:03:31 +00:00
Misha Brukman
fe7a08a933
Fix DForm_4: format is `op r, r, i'
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llvm-svn: 15613
2004-08-10 18:07:55 +00:00
Misha Brukman
65afbbca70
Remove ClassPrefix variable as it's no longer used.
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llvm-svn: 15586
2004-08-09 19:13:29 +00:00
Misha Brukman
1547d8e8d0
Define a ClassPrefix for PowerPC.
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llvm-svn: 15580
2004-08-09 17:46:26 +00:00
Misha Brukman
ba013330a8
Use instruction formats as defined in the PowerPC ISA manual
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llvm-svn: 15577
2004-08-09 17:24:04 +00:00
Misha Brukman
b296dd721c
Remove unused instruction classes
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llvm-svn: 15501
2004-08-04 21:18:57 +00:00
Misha Brukman
e7ad7b2f2a
Replace patterns 0, 4, and 5 with simpler heirarchical definitions that use the
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official PowerPC instruction format lingo: X- and D-form.
llvm-svn: 15422
2004-08-02 21:56:35 +00:00
Misha Brukman
f2119a5b6f
Separate instruction formats from instruction definitions.
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llvm-svn: 15414
2004-08-02 16:54:54 +00:00