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8 Commits

Author SHA1 Message Date
Matt Arsenault
6635d39450 Fix interference caused by fmul 2, x -> fadd x, x
If an fmul was introduced by lowering, it wouldn't be folded
into a multiply by a constant since the earlier combine would
have replaced the fmul with the fadd.

llvm-svn: 216932
2014-09-02 19:02:53 +00:00
Matt Arsenault
840d57e330 R600/SI: implement range reduction for sin/cos
These instructions can only take a limited input range, and return
the constant value 1 out of range. We should do range reduction to
be able to process arbitrary values. Use a FRACT instruction after
normalization to achieve this. Also add a test for constant folding
with the lowered code with unsafe-fp-math enabled.

v2: use DAG lowering instead of intrinsic, adapt test
v3: calculate constant, fold pattern into instruction definition
v4: misc style fixes, add sin-fold testcase, cosmetics

Patch by Grigori Goronzy

llvm-svn: 213458
2014-07-19 18:44:39 +00:00
Tom Stellard
18ca382db4 R600: Expand vector sin and cos.
v2: move code to AMDGPUISelLowering.cpp
    squash with tests (both EG and SI)

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
llvm-svn: 207845
2014-05-02 15:41:47 +00:00
Vincent Lejeune
54d9c8726b R600: Use function inputs to represent data stored in gpr
llvm-svn: 194425
2013-11-11 22:10:24 +00:00
Vincent Lejeune
d29844ad2e R600: Use DAG lowering pass to handle fcos/fsin
NOTE: This is a candidate for the stable branch.
llvm-svn: 185940
2013-07-09 15:03:11 +00:00
Vincent Lejeune
4cef82fa31 R600: Support schedule and packetization of trans-only inst
llvm-svn: 185268
2013-06-29 19:32:43 +00:00
Vincent Lejeune
62da1453e1 R600: Prettier asmPrint of Alu
llvm-svn: 180956
2013-05-02 21:52:30 +00:00
Tom Stellard
6f17e7033b Add R600 backend
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

llvm-svn: 169915
2012-12-11 21:25:42 +00:00