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Commit Graph

7 Commits

Author SHA1 Message Date
Craig Topper
4bf5d86cad [X86] Add OpSize32 to XBEGIN_4. Add XBEGIN_2 with OpSize16.
Requires new AsmParserOperand types that detect 16-bit and 32/64-bit mode so that we choose the right instruction based on default sizing without predicates. This is necessary since predicates mess up the disassembler table building.

llvm-svn: 225256
2015-01-06 08:59:30 +00:00
Craig Topper
8189467f87 Mark XACQUIRE_PREFIX/XRELEASE_PREFIX as isAsmParserOnly so they'll disappear from the disassembler table build without custom filtering code.
llvm-svn: 201215
2014-02-12 08:02:29 +00:00
Stefanus Du Toit
aa267b3e82 Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.
For decoding, keep the current behavior of always decoding these as their REP
versions. In the future, this could be improved to recognize the cases where
these behave as XACQUIRE and XRELEASE and decode them as such.

llvm-svn: 184207
2013-06-18 17:08:10 +00:00
Michael Liao
bd3f6b0eea Add XTEST codegen support
llvm-svn: 178083
2013-03-26 22:47:01 +00:00
Dave Zarzycki
2949721b7d x86 -- add the XTEST instruction
llvm-svn: 177888
2013-03-25 18:59:43 +00:00
Kevin Enderby
319d315d55 Fixes disassembler crashes on 2013 Haswell RTM instructions.
rdar://13318048

llvm-svn: 176828
2013-03-11 21:17:13 +00:00
Michael Liao
59114df23b Add support of RTM from TSX extension
- Add RTM code generation support throught 3 X86 intrinsics:
  xbegin()/xend() to start/end a transaction region, and xabort() to abort a
  tranaction region

llvm-svn: 167573
2012-11-08 07:28:54 +00:00