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52e3873edc
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144 Commits

Author SHA1 Message Date
Owen Anderson
52e3873edc Add support for ARM's specialized vector-compare-against-zero instructions. 
llvm-svn: 118453
 2010-11-08 23:21:22 +00:00
Owen Anderson
add19dd6dd Add codegen and encoding support for the immediate form of vbic. 
llvm-svn: 118291
 2010-11-05 19:27:46 +00:00
Bill Wendling
990c247994 Add encoding for VSTR. 
llvm-svn: 118220
 2010-11-04 00:59:42 +00:00
Owen Anderson
d144bb1ddc Covert VORRIMM to be produced via early target-specific DAG combining, rather than legalization. 
This is both the conceptually correct place for it, as well as allowing it to be more aggressive.

llvm-svn: 118204
 2010-11-03 23:15:26 +00:00
Owen Anderson
1a89511e5d Add support for code generation of the one register with immediate form of vorr. 
We could be more aggressive about making this work for a larger range of constants,
but this seems like a good start.

llvm-svn: 118201
 2010-11-03 22:44:51 +00:00
Owen Anderson
98f9965c89 Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by element size. Instead, 
all of the different element sizes are pseudo instructions that map down to vext.8 underneath, with
the immediate shifted left to reflect the increased element size.

llvm-svn: 118183
 2010-11-03 18:16:27 +00:00
Bill Wendling
34599f4aa8 The MC code couldn't handle ARM LDR instructions with negative offsets: 
vldr.64 d1, [r0, #-32]

The problem was with how the addressing mode 5 encodes the offsets. This change
makes sure that the way offsets are handled in addressing mode 5 is consistent
throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue"
method into an "Imm12" and "addressing mode 5" version. But not to worry! The
majority of the duplicated code has been unified.

llvm-svn: 118144
 2010-11-03 01:49:29 +00:00
Bill Wendling
1546322a9c Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work 
with immediates up to 16-bits in size. The same logic is applied to other LDR
encodings, e.g. VLDR, but which use a different immediate bit width (8-bits in
VLDR's case). Removing the "12" allows it to be more generic.

llvm-svn: 118094
 2010-11-02 22:31:46 +00:00
Owen Anderson
cdd587157f Provide correct encodings for the remaining vst variants that we currently generate. 
llvm-svn: 118087
 2010-11-02 22:18:18 +00:00
Owen Anderson
46d4ab1a87 Add correct encodings for basic variants for vst3 and vst4. 
llvm-svn: 118082
 2010-11-02 21:47:03 +00:00
Owen Anderson
36d5c04fbd Add correct encodings for the basic variants for vst2. 
llvm-svn: 118068
 2010-11-02 21:16:58 +00:00
Owen Anderson
c9f6909c96 Add correct encodings for the basic form of vst1. 
llvm-svn: 118067
 2010-11-02 21:06:06 +00:00
Owen Anderson
ee1337c01f Add correct encodings for the rest of the vld instructions that we generate. 
llvm-svn: 118053
 2010-11-02 20:40:59 +00:00
Owen Anderson
9d85c89ade Add correct NEON encodings for vld2, vld3, and vld4 basic variants. 
llvm-svn: 117997
 2010-11-02 01:24:55 +00:00
Owen Anderson
6647eb222b Add correct NEON encodings for the "multiple single elements" form of vld. 
llvm-svn: 117984
 2010-11-02 00:05:05 +00:00
Bill Wendling
af717e3c58 Use ARM-style comments. 
llvm-svn: 117955
 2010-11-01 21:16:39 +00:00
Owen Anderson
09920faec7 Use ARM-style comment syntax. 
llvm-svn: 117941
 2010-11-01 18:33:37 +00:00
Owen Anderson
dbba9bcc36 Covert this test to .s form. 
llvm-svn: 117939
 2010-11-01 18:30:39 +00:00
Owen Anderson
38af2df6e5 Convert this test to .s form. 
llvm-svn: 117938
 2010-11-01 18:26:43 +00:00
Owen Anderson
8d4bfde002 Covert this test to .s form. 
llvm-svn: 117937
 2010-11-01 18:13:11 +00:00
Owen Anderson
d5757a8585 Covert this test to .s form. 
llvm-svn: 117935
 2010-11-01 18:03:16 +00:00
Jim Grosbach
76910aa62f Mark ARM subtarget features that are available for the assembler. 
llvm-svn: 117929
 2010-11-01 16:59:54 +00:00
Owen Anderson
ccef9fc4fc Convert this test to .s form. 
llvm-svn: 117900
 2010-11-01 05:23:58 +00:00
Bill Wendling
b68e0d0ee3 Some instructions end with an "ls" prefix, but it doesn't indicate that they are 
conditional. Check for those instructions explicitly.

llvm-svn: 117747
 2010-10-29 23:50:21 +00:00
Owen Anderson
ccbb8e7b65 Convert this test to .s form. 
llvm-svn: 117708
 2010-10-29 20:39:19 +00:00
Owen Anderson
7e3af87961 Convert this test to .s form. 
llvm-svn: 117704
 2010-10-29 20:23:45 +00:00
Owen Anderson
1b3d8432b1 Convert this test to .s form. 
llvm-svn: 117699
 2010-10-29 20:17:07 +00:00
Owen Anderson
fc007fef16 Convert this test to .s form. 
llvm-svn: 117696
 2010-10-29 20:12:34 +00:00
Owen Anderson
2119e59322 Covert this test to .s form. 
llvm-svn: 117694
 2010-10-29 19:56:07 +00:00
Owen Anderson
b75ef99b0c Convert this test to .s form. 
llvm-svn: 117693
 2010-10-29 19:51:11 +00:00
Owen Anderson
9e3265d3da Convert this test to .s form. 
llvm-svn: 117690
 2010-10-29 19:45:32 +00:00
Owen Anderson
f9a6495d0a Convert this test to .s form. 
llvm-svn: 117689
 2010-10-29 19:37:05 +00:00
Owen Anderson
8fb42c665e Convert this test to .s form. 
llvm-svn: 117686
 2010-10-29 19:17:08 +00:00
Owen Anderson
230358caab Convert this test to .s form. 
llvm-svn: 117685
 2010-10-29 19:09:08 +00:00
Owen Anderson
4176d55f79 Covert this test to .s form. 
llvm-svn: 117684
 2010-10-29 19:05:26 +00:00
Owen Anderson
cc7d9dcb52 Convert this test to .s form. 
llvm-svn: 117683
 2010-10-29 18:58:30 +00:00
Owen Anderson
4e1532000b Convert this test to .s form. 
llvm-svn: 117682
 2010-10-29 18:48:59 +00:00
Owen Anderson
a84837747c Convert this file to less fragile .s form. 
llvm-svn: 117681
 2010-10-29 18:41:40 +00:00
Owen Anderson
8e290aafbd Replace this test with the less fragile .s version. Still XFAIL'd, since the ASM parser doesn't parse vabal yet. 
llvm-svn: 117679
 2010-10-29 18:31:26 +00:00
Owen Anderson
840931e8ed Covert this test to a .s file to reduce fragility. 
llvm-svn: 117676
 2010-10-29 18:18:40 +00:00
Owen Anderson
9930e7bcb6 Convert this test to a .s file, so that it's not sensitive to codegen changes. 
llvm-svn: 117633
 2010-10-29 01:01:56 +00:00
Chris Lattner
115cd02d22 add simple support for addrmode5 operands, allowing 
vldr.64 to work.  I have no idea if this is fully right, but 
it is in the right direction.

llvm-svn: 117626
 2010-10-29 00:27:31 +00:00
Chris Lattner
1917294eb5 most simple arm instructions match correctly now, 
it looks like we're not handling [] operands though

llvm-svn: 117607
 2010-10-28 21:31:07 +00:00
Chris Lattner
bd838d16e5 fix the asmmatcher generator to handle targets with no RegisterPrefix 
(like ARM) correctly.  With this change, we can now match "bx lr"
because we recognize lr as a register.

llvm-svn: 117606
 2010-10-28 21:28:42 +00:00
Evan Cheng
72be097417 Disable most of the ARM vfp / NEON MC tests. These are too fragile to be useful. 
I'll work with Jim, Owen, and Bill on an alternative testing strategy until
the assembly parser is available.

llvm-svn: 117530
 2010-10-28 06:46:17 +00:00
Owen Anderson
e75f7c5419 Add correct NEON encodings for vtbl and vtbx. 
llvm-svn: 117513
 2010-10-28 00:18:46 +00:00
Owen Anderson
008116cb71 Add correct NEON encodings for vext, vtrn, vuzp, and vzip. 
llvm-svn: 117512
 2010-10-27 23:56:39 +00:00
Owen Anderson
27049dbce3 Tests for NEON encoding of vrev. 
llvm-svn: 117502
 2010-10-27 22:54:49 +00:00
Owen Anderson
9437a20a72 Provide correct encodings for NEON vcvt, which has its own special immediate encoding 
for specifying fractional bits for fixed point conversions.

llvm-svn: 117501
 2010-10-27 22:49:00 +00:00
Owen Anderson
d28d229ded Provide correct encodings for the get_lane and set_lane variants of vmov. 
llvm-svn: 117495
 2010-10-27 21:28:09 +00:00