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Commit Graph

108676 Commits

Author SHA1 Message Date
Eric Christopher
065fdace2e Remove uses of the TargetMachine from FunctionLoweringInfo
via caching TargetLowering and using the MachineFunction.

llvm-svn: 219375
2014-10-09 00:57:31 +00:00
David Blaikie
4e189e100b Push DwarfDebug::attachRangesOrLowHighPC down into DwarfCompileUnit
llvm-svn: 219372
2014-10-09 00:21:42 +00:00
David Blaikie
f2869de8da Sink DwarfDebug::addScopeRangeList down into DwarfCompileUnit
(& add a few accessors/make a couple of things public for this - it's a
bit of a toss-up, but I think I prefer it this way, keeping some more of
the meaty code down in DwarfCompileUnit - if only to make for smaller
implementation files, etc)

I think we could simplify range handling a bit if we removed the range
lists from each unit and just put a single range list on DwarfDebug,
similar to address pooling.

llvm-svn: 219370
2014-10-09 00:11:39 +00:00
Eric Christopher
fb763ff585 Remove unnecessary include.
llvm-svn: 219368
2014-10-08 23:38:40 +00:00
Eric Christopher
c47c81ea7a Use both the cached TLI and the subtarget off of the DAG in
the DAG combiner.

llvm-svn: 219367
2014-10-08 23:38:39 +00:00
Eric Christopher
2dae75a164 Remove getSubtargetImpl calls from FastISel, we can get it from
the MachineFunction where it's already cached.

llvm-svn: 219366
2014-10-08 23:38:33 +00:00
Robin Morisset
60d53043dc Fix typo in comment
llvm-svn: 219365
2014-10-08 23:30:45 +00:00
David Blaikie
86080e417c Sink DwarfUnit::addSectionDelta into DwarfCompileUnit, the only place it's needed.
llvm-svn: 219364
2014-10-08 23:30:05 +00:00
Adam Nemet
248c8e9281 [AVX512] Rename AVX512_masking* to AVX512_maskable*
No functional change.

This is the current AVX512_maskable multiclass hierarchy:

                 maskable_custom
                    /       \
                   /         \
          maskable_common   maskable_in_asm
            /         \
           /           \
      maskable        maskable_3src

llvm-svn: 219363
2014-10-08 23:25:39 +00:00
Adam Nemet
9fae2c02a0 [AVX512] Intrinsics for vextract*x4
This adds the Pat<>'s for the intrinsics.  These are necessary because we
don't lower these intrinsics to SDNodes but match them directly.  See the
rational in the previous commit.

llvm-svn: 219362
2014-10-08 23:25:37 +00:00
Adam Nemet
671fc00888 [AVX512] Add asm-only support for vextract*x4 masking variants
These derive from the new asm-only masking definitions.

Unfortunately I wasn't able to find a ISel pattern that we could legally
generate for the masking variants.  The problem is that since the destination
is v4* we would need VK4 register classes and v4i1 value types to express the
masking.  These are however not legal types/classes in AVX512f but only in VL,
so things get complicated pretty quickly.  We can revisit this question later
if we have a more pressing need to express something like this.

So the ISel patterns are empty for the masking instructions and the next patch
will add Pat<>s instead to match the intrinsics calls with instructions.

llvm-svn: 219361
2014-10-08 23:25:33 +00:00
Adam Nemet
701fdeb2f8 [AVX512] Move DAG for all-zero node to X86VectorVTInfo
No functional change.

No change in X86.td.expanded except for the appearance of the new attributes.

The new attributes will be used in the subsequent patch.

llvm-svn: 219360
2014-10-08 23:25:31 +00:00
Adam Nemet
80cc28c134 [AVX512] Support mask register in MRMDestReg format
This is necessary for masking vextract*x4.

llvm-svn: 219359
2014-10-08 23:25:29 +00:00
Adam Nemet
81fdcfd475 [AVX512] Peel off an asm-only class from AVX512_masking_common.
No functional change.

This enables the generation of masking instructions that don't provide a
ISel pattern.

llvm-svn: 219358
2014-10-08 23:25:23 +00:00
Robin Morisset
c53597d7c5 [X86] Don't transform atomic-load-add into an inc/dec when inc/dec is slow
llvm-svn: 219357
2014-10-08 23:16:23 +00:00
David Blaikie
f68bfbaaa6 Reformat some stuff I missed in recent previous commits
llvm-svn: 219356
2014-10-08 23:09:42 +00:00
Alexey Samsonov
88789ae22c Revert r219354. It seems to break some buildbots.
llvm-svn: 219355
2014-10-08 23:07:59 +00:00
Alexey Samsonov
6a2cac3b87 Use llvm-symbolizer to symbolize LLVM/Clang crash dumps.
This change modifies fatal signal handler used in LLVM tools.
Now it attempts to find llvm-symbolizer binary and communicates
with it in order to turn instruction addresses into
function/file/line info entries. This should significantly improve
stack traces readability in Debug builds.

This feature only works on selected platforms (including Darwin
and Linux). If the symbolization fails for some reason, signal
handler will fallback to the original behavior.

Reviewed in http://reviews.llvm.org/D5610

llvm-svn: 219354
2014-10-08 22:57:47 +00:00
David Blaikie
802d562b37 Sink and coalesce DwarfDebug.cpp::addSectionLabel and DwarfUnit::addSectionLabel down into DwarfCompileUnit::addSectionLabel
llvm-svn: 219351
2014-10-08 22:46:27 +00:00
Eric Christopher
a1080be376 Remove dead call to getTypeToTransformTo. The result is
unused.

llvm-svn: 219347
2014-10-08 22:25:45 +00:00
David Blaikie
644527ade8 DebugInfo: The rest of pushing DwarfDebug::constructScopeDIE down into DwarfCompileUnit
Funnily enough, I copied it, but didn't actually remove the original in
r219345. Let's do that.

llvm-svn: 219346
2014-10-08 22:23:10 +00:00
David Blaikie
c48de79313 Push DwarfDebug::constructScopeDIE down into DwarfCompileUnit
One of many steps to generalize subprogram emission to both the DWO and
non-DWO sections (to emit -gmlt-like data under fission). Once the
functions are pushed down into DwarfCompileUnit some of the data
structures will be pushed at least into DwarfFile so that they can be
unique per-file, allowing emission to both files independently.

llvm-svn: 219345
2014-10-08 22:20:02 +00:00
Eric Christopher
860e89dbbd Remove a bunch of getSubtargetImpl calls since we already have
a cached TLI instance.

llvm-svn: 219342
2014-10-08 21:08:32 +00:00
Robin Morisset
2f2a857e2b [X86] Avoid generating inc/dec when slow for x.atomic_store(1 + x.atomic_load())
Summary:
I had forgotten to check for NotSlowIncDec in the patterns that can generate
inc/dec for the above pattern (added in D4796).
This currently applies to Atom Silvermont, KNL and SKX.

Test Plan: New checks on atomic_mi.ll

Reviewers: jfb, nadav

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5677

llvm-svn: 219336
2014-10-08 19:38:18 +00:00
David Majnemer
3c56dcb7eb Inliner: Non-local functions in COMDATs shouldn't be dropped
A function with discardable linkage cannot be discarded if its a member
of a COMDAT group without considering all the other COMDAT members as
well.  This sort of thing is already handled by GlobalOpt/GlobalDCE.

This fixes PR21206.

llvm-svn: 219335
2014-10-08 19:32:32 +00:00
Timur Iskhodzhanov
7661ce203f Fix COFF section index relocation should be 16 bits, not 32
Original patch by Andrey Guskov!
http://reviews.llvm.org/D5651

llvm-svn: 219327
2014-10-08 18:01:49 +00:00
Rafael Espindola
b588ed4621 Correctly compute the size of common symbols in COFF.
llvm-svn: 219324
2014-10-08 17:37:19 +00:00
Rafael Espindola
aedb229c48 Print symbol sizes in this test in preparation for fixing COFF common sizes.
llvm-svn: 219320
2014-10-08 17:19:42 +00:00
Justin Bogner
885b53fc78 Revert "[InstCombine] re-commit r218721 with fix for pr21199"
This seems to cause a miscompile when building clang, which causes a
bootstrapped clang to fail or crash in several of its tests.

See:
  http://lab.llvm.org:8013/builders/clang-x86_64-darwin11-RA/builds/1184
  http://bb.pgr.jp/builders/clang-3stage-x86_64-linux/builds/7813

This reverts commit r219282.

llvm-svn: 219317
2014-10-08 16:30:22 +00:00
Robert Khasanov
6a848d2b84 [AVX512] Added intrinsics for 128-, 256- and 512-bit versions of VPCMP/VPCMPU{BWDQ}
Added CMP_MASK_CC intrinsic type.
Added tests for intrinsics.

Patch by Sergey Lisitsyn <sergey.lisitsyn@intel.com>

llvm-svn: 219316
2014-10-08 15:49:26 +00:00
Rafael Espindola
d01a093e4e Remove bogus std::error_code returns form SectionRef.
There are two methods in SectionRef that can fail:

* getName: The index into the string table can be invalid.
* getContents: The section might point to invalid contents.

Every other method will always succeed and returning and std::error_code just
complicates the code. For example, a section can have an invalid alignment,
but if we are able to get to the section structure at all and create a
SectionRef, we will always be able to read that invalid alignment.

llvm-svn: 219314
2014-10-08 15:28:58 +00:00
Rafael Espindola
3090434e47 Fix indentation.
llvm-svn: 219312
2014-10-08 15:12:20 +00:00
Frederic Riss
b9c655ff6b Update dwarf::ApplePropertyAttributes enum to meaningful values.
Summary:
We currently emit an DW_AT_APPLE_property_attribute with a value that is a
bitfield describing the various attributes applied to an ObjectiveC property.
While trying to add testing to one of my dwarfdump patches that would pretty
print that, I realized this information looks totally broken and has maybe
never been correct.

As with every DWARF info, we have some enum in Dwarf.h that describes this
attribute (enum ApplePropertyAttributes). It seems however that the attribute
value is set from another definition of these flags in Sema/DeclSpec.h (enum
ObjCPropertyAttributeKind). And these 2 enums aren't in sync.

This patch updates the Dwarf.h values to the ones we are (and have been for
a very long time) emitting. We change some publicly (and even documented
in SourceLevelDebugging.rst) values, but I doubt this could be an issue as
the information has been wrong for so long...

Reviewers: echristo, dblaikie, aprantl

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5653

llvm-svn: 219311
2014-10-08 14:59:44 +00:00
Robert Khasanov
643ca10b43 [AVX512] Refactoring of avx512_binop_rm multiclass through AVX512_masking.
Added new argrument for AVX512_masking: InstrItinClass and bit isCommutable.
No functional change.

llvm-svn: 219310
2014-10-08 14:37:45 +00:00
Rafael Espindola
863ff21a8b Remove an out of date comment.
After 4 years there is still no normalization library. We do support
disassembly and relocations, so it doesn't look like we need it.

llvm-svn: 219308
2014-10-08 14:27:05 +00:00
Renato Golin
23c290356f Emit unaligned access build attribute for ARM
Patch by Charlie Turner.

llvm-svn: 219301
2014-10-08 12:26:22 +00:00
Renato Golin
89819e0935 Refactor isThumb1Only() && isMClass() into a predicate called isV6M()
This must be enforced for all v6M cores, not just the cortex-m0,
irregardless of the user-specified alignment.

Patch by Charlie Turner.

llvm-svn: 219300
2014-10-08 12:26:16 +00:00
Renato Golin
3465effae4 Simplify switch statement in ARM subtarget align access
This switch can be reduced to a simpler if/else statement.

Patch by Charlie Turner.

llvm-svn: 219299
2014-10-08 12:26:13 +00:00
Eric Christopher
fdc12cc58d Use the TargetLowering information we already have on the
SelectionDAG in SelectionDAGBuilder rather than going through
the TargetMachine for lookup.

llvm-svn: 219292
2014-10-08 09:50:54 +00:00
Eric Christopher
fd1a5ab45f Grab the TargetRegisterInfo off of the subtarget from the
MachineFunction rather than a lookup on the TargetMachine
to avoid unnecessary lookups.

llvm-svn: 219291
2014-10-08 09:50:52 +00:00
Renato Golin
cfffbc9054 Update git-svnrevert to accept git and svn revisions
Interchangeable commit ids can now be used on this git-svnrevert, which
will figure out what kind of commit that is (if you use format rNNNN for SVN
commits) and make sure the right ids are used in the right places.

It's a little bit more robust and user-friendly.

llvm-svn: 219290
2014-10-08 09:32:47 +00:00
David Majnemer
e12e7ef0c8 Unix/Process: Don't use pthread_sigmask if we aren't built with threads
We won't link in pthreads if we weren't built with LLVM_ENABLE_THREADS
which means we won't get access to pthread_sigmask.  Use sigprocmask
instead.

llvm-svn: 219288
2014-10-08 08:48:43 +00:00
Eric Christopher
c561a308cd Replace calls to get the subtarget and TargetFrameLowering with
cached variables and a single call in the constructor.

llvm-svn: 219287
2014-10-08 08:46:34 +00:00
Suyog Sarda
f043b064a7 Format spacing and remove extra lines to comply with standards. NFC.
Differential Revision: http://reviews.llvm.org/D5649
 

llvm-svn: 219286
2014-10-08 08:37:49 +00:00
Eric Christopher
3d7c1d381d Use cached subtarget rather than looking it up on the
TargetMachine again.

llvm-svn: 219285
2014-10-08 07:51:41 +00:00
Eric Christopher
ce3f63df4d Cache TargetLowering on SelectionDAGISel and update previous
calls to getTargetLowering() with the cached variable.

llvm-svn: 219284
2014-10-08 07:32:17 +00:00
David Majnemer
af56987177 GlobalOpt: Don't drop unused memberes of a Comdat
A linkonce_odr member of a COMDAT shouldn't be dropped if we need to
keep the entire COMDAT group.

This fixes PR21191.

llvm-svn: 219283
2014-10-08 07:23:31 +00:00
Gerolf Hoflehner
2a4154d00e [InstCombine] re-commit r218721 with fix for pr21199
The icmp-select-icmp optimization targets select-icmp.eq
only. This is now ensured by testing the branch predicate
explictly. This commit also includes the test case for pr21199.

llvm-svn: 219282
2014-10-08 06:42:19 +00:00
David Majnemer
259d91a99b COFF: Don't oversize COMMON symbols when targeting BFD ld
COFF normally doesn't allow us to describe the alignment of COMMON
symbols.

It turns out that most linkers use the symbol size as a hint as to how
aligned the symbol should be.

However the BFD folks have added a .drectve command, which we
now support as of r219229, that allows us to specify the alignment
precisely.  With this in mind, stop rounding sizes up.

llvm-svn: 219281
2014-10-08 06:38:53 +00:00
David Majnemer
0cbbaa3300 llvm-dwarfdump: Add support for some COFF relocations
DWARF in COFF utilizes several relocations.  Implement support for them
in RelocVisitor to support llvm-dwarfdump.

llvm-svn: 219280
2014-10-08 06:38:50 +00:00