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2 Commits

Author SHA1 Message Date
Craig Topper
be31de50ad [X86] Add suffixes to the LGDT/LIDT/SGDT/SIDT mnemonics in Intel syntax. Add aliases based on 16/32-bit mode to choose the default.
This allows the instruction selection to follow mode in Intel syntax. And allows a suffix to be used to change size.

This matches gas behavior from what I could tell.

llvm-svn: 331138
2018-04-29 06:24:09 +00:00
Reid Kleckner
363b599ec0 MC: Split the x86 asm matcher implementations by dialect
The existing matcher has lots of AT&T assembly dialect assumptions baked
into it.  In particular, the hack for resolving the size of a memory
operand by appending the four most common suffixes doesn't work at all.
The Intel assembly dialect mnemonic table has ambiguous entries, so we
need to try matching multiple times with different operand sizes, since
that's the only way to choose different instruction variants.

This makes us more compatible with gas's implementation of Intel
assembly syntax.  MSVC assumes you want byte-sized operations for the
instructions that we reject as ambiguous.

Reviewed By: grosbach

Differential Revision: http://reviews.llvm.org/D4747

llvm-svn: 216481
2014-08-26 20:32:34 +00:00