Jeff Cohen
|
28a7bd94c9
|
Fix typo.
llvm-svn: 25760
|
2006-01-29 03:45:35 +00:00 |
|
Jeff Cohen
|
3ef56b005a
|
Flesh out AMD family/models.
llvm-svn: 25755
|
2006-01-28 20:30:18 +00:00 |
|
Jeff Cohen
|
08656fa2a6
|
Correctly determine CPU vendor.
llvm-svn: 25754
|
2006-01-28 19:48:34 +00:00 |
|
Jeff Cohen
|
057816014c
|
Use union instead of reinterpret_cast.
llvm-svn: 25751
|
2006-01-28 18:47:32 +00:00 |
|
Jeff Cohen
|
6d330738c1
|
Fix recognition of Intel CPUs.
llvm-svn: 25750
|
2006-01-28 18:38:20 +00:00 |
|
Chris Lattner
|
e5bf55bf7b
|
Is64Bit reflects the capability of the chip, not an aspect of the target os
llvm-svn: 25749
|
2006-01-28 18:23:48 +00:00 |
|
Chris Lattner
|
0256ca3257
|
Fix a bunch of JIT failures with the new isel
llvm-svn: 25748
|
2006-01-28 18:19:37 +00:00 |
|
Jeff Cohen
|
4d971bdfa7
|
Improve X86 subtarget support for Windows and AMD.
llvm-svn: 25747
|
2006-01-28 18:09:06 +00:00 |
|
Chris Lattner
|
744d9a40f0
|
silence a warning
llvm-svn: 25745
|
2006-01-28 10:34:47 +00:00 |
|
Chris Lattner
|
686a1203f0
|
make this work on non-native hosts
llvm-svn: 25734
|
2006-01-28 06:05:41 +00:00 |
|
Evan Cheng
|
442713efd7
|
A bit of wisdom from Chris on the last entry.
llvm-svn: 25715
|
2006-01-27 22:54:32 +00:00 |
|
Evan Cheng
|
03aaa82992
|
AT&T assembly convention: registers are in lower case.
llvm-svn: 25714
|
2006-01-27 22:53:29 +00:00 |
|
Chris Lattner
|
35d325e8aa
|
initialize all instance vars
llvm-svn: 25711
|
2006-01-27 22:37:09 +00:00 |
|
Evan Cheng
|
51c1d32061
|
Added notes about a x86 isel deficiency.
llvm-svn: 25706
|
2006-01-27 22:11:01 +00:00 |
|
Evan Cheng
|
5c1d0d40dc
|
Added a temporary option -enable-x86-sse to enable sse support. It is used by
llc-beta.
llvm-svn: 25701
|
2006-01-27 21:49:34 +00:00 |
|
Evan Cheng
|
746086dc97
|
Bye bye Pattern ISel, hello DAG ISel.
llvm-svn: 25700
|
2006-01-27 21:26:54 +00:00 |
|
Nate Begeman
|
d2c6fbef4a
|
Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
the same functionality. This addresses another piece of bug 680. Next,
on to fixing Alpha VAARG, which I broke last time.
llvm-svn: 25696
|
2006-01-27 21:09:22 +00:00 |
|
Evan Cheng
|
577ea086c4
|
A better workaround
llvm-svn: 25692
|
2006-01-27 19:30:30 +00:00 |
|
Chris Lattner
|
932260bb64
|
force sse/3dnow off until they work. This fixes all the x86 failures last night
llvm-svn: 25690
|
2006-01-27 18:30:50 +00:00 |
|
Chris Lattner
|
e1f4b9e384
|
Unbreak the JIT with SSE
llvm-svn: 25688
|
2006-01-27 18:27:18 +00:00 |
|
Evan Cheng
|
5891f49c47
|
x86 CPU detection and proper subtarget support
llvm-svn: 25679
|
2006-01-27 08:10:46 +00:00 |
|
Chris Lattner
|
20d4194a0d
|
PHI and INLINEASM are now built-in instructions provided by Target.td
llvm-svn: 25674
|
2006-01-27 01:46:15 +00:00 |
|
Jeff Cohen
|
f329a41a66
|
Improve compatibility with VC2005, patch by Morten Ofstad!
llvm-svn: 25661
|
2006-01-26 20:41:32 +00:00 |
|
Chris Lattner
|
bfd5404cbf
|
Improve compatibility with VC2005, patch by Morten Ofstad!
llvm-svn: 25653
|
2006-01-26 19:55:20 +00:00 |
|
Evan Cheng
|
670dc80530
|
Added preliminary x86 subtarget support.
llvm-svn: 25645
|
2006-01-26 09:53:06 +00:00 |
|
Evan Cheng
|
7a77e3f80c
|
Work around some x86 Darwin assembler bugs
llvm-svn: 25638
|
2006-01-26 02:27:43 +00:00 |
|
Evan Cheng
|
bf29b90240
|
When trying to fold X86::SETCC into a Select, make a copy if it has more than
one use. This allows more CMOV instructions.
llvm-svn: 25634
|
2006-01-26 02:13:10 +00:00 |
|
Evan Cheng
|
224e14daa1
|
Remove the uses of STATUS flag register. Rely on node property SDNPInFlag,
SDNPOutFlag, and SDNPOptInFlag instead.
llvm-svn: 25629
|
2006-01-26 00:29:36 +00:00 |
|
Nate Begeman
|
c29fac7fce
|
First part of bug 680:
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
llvm-svn: 25606
|
2006-01-25 18:21:52 +00:00 |
|
Evan Cheng
|
46f85ddd84
|
X86 prefer scheduling for reduced register pressure.
llvm-svn: 25602
|
2006-01-25 09:15:17 +00:00 |
|
Evan Cheng
|
b463e81b83
|
Fix a selectcc lowering bug. Make a copy of X86ISD::CMP when folding it.
llvm-svn: 25596
|
2006-01-25 09:05:09 +00:00 |
|
Chris Lattner
|
8ddb0c3df8
|
Loosen up these checks to allow direct uses of ESP
llvm-svn: 25595
|
2006-01-25 08:00:36 +00:00 |
|
Chris Lattner
|
f2a2d62f48
|
use ESP directly, not a copy of ESP into some other register for fastcc calls
llvm-svn: 25584
|
2006-01-24 06:14:44 +00:00 |
|
Chris Lattner
|
c078165ea6
|
Emit the copies out of call return registers *after* the ISD::CALLSEQ_END
node, fixing fastcc and the case where a function has a frame pointer due
to dynamic allocas.
llvm-svn: 25580
|
2006-01-24 05:17:12 +00:00 |
|
Chris Lattner
|
2873307819
|
Allow jit-beta to work
llvm-svn: 25578
|
2006-01-24 04:50:48 +00:00 |
|
Chris Lattner
|
aafc339b4e
|
Add explicit #includes of <iostream>
llvm-svn: 25515
|
2006-01-22 23:41:00 +00:00 |
|
Evan Cheng
|
2e4479d4a8
|
Rename fcmovae to fcmovnb and fcmova to fcmovnbe (following Intel manual).
Some assemblers can't recognize the aliases.
llvm-svn: 25494
|
2006-01-21 02:55:41 +00:00 |
|
Chris Lattner
|
eacfe56de8
|
LowerReturn now doesn't have to handle f32 returns.
llvm-svn: 25484
|
2006-01-20 18:41:25 +00:00 |
|
Evan Cheng
|
ffbc93d829
|
Stop doing that accidental commit.
llvm-svn: 25474
|
2006-01-20 01:14:05 +00:00 |
|
Evan Cheng
|
2b24240110
|
A few more SH{L|R}D peepholes.
llvm-svn: 25473
|
2006-01-20 01:13:30 +00:00 |
|
Evan Cheng
|
d2c0ccedd3
|
Didn't mean to commit the last one.
llvm-svn: 25469
|
2006-01-19 23:27:08 +00:00 |
|
Evan Cheng
|
e0f6454c5e
|
Added i16 SH{L|R}D patterns.
llvm-svn: 25468
|
2006-01-19 23:26:24 +00:00 |
|
Evan Cheng
|
680a8e070b
|
Avoid generating a redundant setcc.
llvm-svn: 25457
|
2006-01-19 08:52:46 +00:00 |
|
Evan Cheng
|
cfe9d47379
|
adc and sbb need an incoming flag to ensure it reads the carry flag
from add / sub.
llvm-svn: 25444
|
2006-01-19 06:53:20 +00:00 |
|
Evan Cheng
|
be2cf5f948
|
Two peepholes:
(or (x >> c) | (y << (32 - c))) ==> (shrd x, y, c)
(or (x << c) | (y >> (32 - c))) ==> (shld x, y, c)
llvm-svn: 25438
|
2006-01-19 01:56:29 +00:00 |
|
Evan Cheng
|
ddb170b73e
|
Didn't mean to check that in.
llvm-svn: 25436
|
2006-01-19 01:52:56 +00:00 |
|
Evan Cheng
|
aebece2f7b
|
A obvious typo
llvm-svn: 25435
|
2006-01-19 01:46:14 +00:00 |
|
Evan Cheng
|
92c122b26f
|
SRA shift amount must be in i8
llvm-svn: 25416
|
2006-01-18 09:26:46 +00:00 |
|
Evan Cheng
|
4d841aaa98
|
If a call return type is i1, insert a truncate from X86::AL to i1.
llvm-svn: 25415
|
2006-01-18 08:08:38 +00:00 |
|
Evan Cheng
|
208f5076a0
|
Fix lowering of calls which return f32 values.
llvm-svn: 25413
|
2006-01-17 21:58:21 +00:00 |
|