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20 Commits

Author SHA1 Message Date
Asaf Badouh
381b11d5f2 [X86][AVX512DQ] add scalar fpclass 
Differential Revision: http://reviews.llvm.org/D13769

llvm-svn: 250650
 2015-10-18 11:04:38 +00:00
Igor Breger
63cd1bda1b AVX512: vpextrb/w/d/q and vpinsrb/w/d/q implementation. 
This instructions doesn't have intrincis.
Added tests for lowering and encoding.

Differential Revision: http://reviews.llvm.org/D12317

llvm-svn: 249688
 2015-10-08 12:55:01 +00:00
Asaf Badouh
4ce11a0a36 [X86][AVX512] extend support in Scalar conversion 
add scalar FP to Int conversion with truncation intrinsics
add scalar conversion FP32 from/to FP64 intrinsics
add rounding mode and SAE mode encoding for these intrinsics

Differential Revision: http://reviews.llvm.org/D12665

llvm-svn: 248117
 2015-09-20 14:31:19 +00:00
Asaf Badouh
981ab82bef [X86][AVX512DQ] Add fpclass instruction 
Differential Revision: http://reviews.llvm.org/D12931

llvm-svn: 248115
 2015-09-20 08:46:07 +00:00
Igor Breger
43e0d98a01 AVX512: Implement instructions encoding, lowering and intrinsics 
vinserti64x4, vinserti64x2, vinserti32x8, vinserti32x4, vinsertf64x4, vinsertf64x2, vinsertf32x8, vinsertf32x4
Added tests for encoding, lowering and intrinsics.

Differential Revision: http://reviews.llvm.org/D11893

llvm-svn: 248111
 2015-09-20 06:52:42 +00:00
Igor Breger
eeecfc6724 AVX512: Implemented encoding and intrinsics for 
vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D11802

llvm-svn: 247276
 2015-09-10 12:54:54 +00:00
Renato Golin
32a92f6d16 Revert "AVX512: Implemented encoding and intrinsics for vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4 Added tests for intrinsics and encoding." 
This reverts commit r247149, as it was breaking numerous buildbots of varied architectures.

llvm-svn: 247177
 2015-09-09 19:44:40 +00:00
Igor Breger
1a3ef530c1 AVX512: Implemented encoding and intrinsics for 
vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D11802

llvm-svn: 247149
 2015-09-09 14:35:09 +00:00
Igor Breger
e7da3698f2 AVX512: ktest implemantation 
Added tests for encoding.

Differential Revision: http://reviews.llvm.org/D11979

llvm-svn: 246439
 2015-08-31 13:30:19 +00:00
Igor Breger
d931ce02d4 AVX512: kadd implementation 
Added tests for encoding.

Differential Revision: http://reviews.llvm.org/D11973

llvm-svn: 246432
 2015-08-31 11:50:23 +00:00
Asaf Badouh
7feb9eaba0 [X86][AVX512] add reduce/range/scalef/rndScale 
include encoding and intrinsics

Differential Revision: http://reviews.llvm.org/D11222

llvm-svn: 242896
 2015-07-22 12:00:43 +00:00
Elena Demikhovsky
618bae6f38 AVX-512: Added all AVX-512 forms of Vector Convert for Float/Double/Int/Long types. 
In this patch I have only encoding. Intrinsics and DAG lowering will be in the next patch.
I temporary removed the old intrinsics test (just to split this patch).
Half types are not covered here.

Differential Revision: http://reviews.llvm.org/D11134

llvm-svn: 242023
 2015-07-13 13:26:20 +00:00
Elena Demikhovsky
c14282d277 AVX-512: Implemented VRANGESD and VRANGESS instructions for SKX Implemented DAG lowering for all these forms. 
Added tests for encoding.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238834
 2015-06-02 14:12:54 +00:00
Elena Demikhovsky
9e9a44e5bd AVX-512: Implemented VRANGEPD and VRANGEPD instructions for SKX. 
Implemented DAG lowering for all these forms.
Added tests for encoding.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238738
 2015-06-01 11:05:34 +00:00
Elena Demikhovsky
7d3b86db52 AVX-512: Added VBROADCASTF64X4, VBROADCASTF64X2, VBROADCASTI32X8, and other instructions from this set 
Added encoding tests.

llvm-svn: 237557
 2015-05-18 06:42:57 +00:00
Elena Demikhovsky
75f13a4f1a AVX-512: enabled tests for AVX512F set 
llvm-svn: 236416
 2015-05-04 11:09:41 +00:00
Elena Demikhovsky
abf0138a81 AVX-512: Added logical and arithmetic instructions for SKX 
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 235375
 2015-04-21 10:27:40 +00:00
Robert Khasanov
1896253278 [AVX512] Extended avx512_binop_rm to DQ/VL subsets. 
Added encoding tests.

llvm-svn: 219686
 2014-10-14 15:13:56 +00:00
Robert Khasanov
d86d770d47 [SKX] Enabling mask logic instructions: encoding, lowering 
Instructions: KAND{BWDQ}, KANDN{BWDQ}, KOR{BWDQ}, KXOR{BWDQ}, KXNOR{BWDQ}

Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com>

llvm-svn: 214081
 2014-07-28 13:46:45 +00:00
Robert Khasanov
4f172d9c81 [SKX] Added missed test files for rev 213757 
llvm-svn: 213780
 2014-07-23 18:17:49 +00:00