1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-02 00:42:52 +01:00
Commit Graph

10 Commits

Author SHA1 Message Date
Bill Wendling
68934338ab * Correct encoding for VSRI.
* Add tests for VSRI and VSLI.

llvm-svn: 127297
2011-03-09 00:33:17 +00:00
Bill Wendling
b790c462c0 Correct the encoding for VRSRA and VSRA instructions.
llvm-svn: 127294
2011-03-09 00:00:35 +00:00
Bill Wendling
ab9f04b6d8 * Fix VRSHR and VSHR to have the correct encoding for the immediate.
* Update the NEON shift instruction test to expect what 'as' produces.

llvm-svn: 127293
2011-03-08 23:48:09 +00:00
Bill Wendling
0e4923ebe5 A few more tests for instruction encodings.
llvm-svn: 127209
2011-03-08 02:51:48 +00:00
Bill Wendling
958e854f40 Rename the narrow shift right immediate operands to "shr_imm*" operands. Also
expand the testing of the narrowing shift right instructions.

No functionality change.

llvm-svn: 127193
2011-03-07 23:38:41 +00:00
Bill Wendling
304dda7810 Narrow right shifts need to encode their immediates differently from a normal
shift.

   16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0>
   32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0>
   64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0>

llvm-svn: 126723
2011-03-01 01:00:59 +00:00
Bob Wilson
1082705e72 Fix misspelled target triples in MC/ARM test commands.
llvm-svn: 121901
2010-12-15 22:14:01 +00:00
Owen Anderson
09920faec7 Use ARM-style comment syntax.
llvm-svn: 117941
2010-11-01 18:33:37 +00:00
Jim Grosbach
76910aa62f Mark ARM subtarget features that are available for the assembler.
llvm-svn: 117929
2010-11-01 16:59:54 +00:00
Owen Anderson
ccef9fc4fc Convert this test to .s form.
llvm-svn: 117900
2010-11-01 05:23:58 +00:00