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Commit Graph

1191 Commits

Author SHA1 Message Date
Benjamin Kramer
5d5a0e4f68 Avoid copies of std::strings and APInt/APFloats where we only read from it
As suggested by clang-tidy's performance-unnecessary-copy-initialization.
This can easily hit lifetime issues, so I audited every change and ran the
tests under asan, which came back clean.

llvm-svn: 272126
2016-06-08 10:01:20 +00:00
Krzysztof Parzyszek
de2b1f74b1 Revert r272045 since GCC doesn't know how to compile it.
llvm-svn: 272048
2016-06-07 19:25:28 +00:00
Krzysztof Parzyszek
2b69176efd [Hexagon] Modify HexagonExpandCondsets to handle subregisters
Also, switch to using functions from LiveIntervalAnalysis to update
live intervals, instead of performing the updates manually.

llvm-svn: 272045
2016-06-07 19:06:23 +00:00
Chandler Carruth
0146014860 Remove bogus initialization of the PPC and Hexagon SelectionDAGISel
subclasses. These are not passes proper. We don't support registering
them, they can't be constructed with default arguments, and the ID is
actually in a base class.

Only these two targets even had any boiler plate to try to do this, and
it had to be munged out of the INITIALIZE_PASS macros to work. What's
worse, the boiler plate has rotted and the "name" of the pass is
actually the description string now!!! =/ All of this is completely
unnecessary. No other target bothers, and nothing breaks if you don't
initialize them because CodeGen has an entirely separate initialization
path that is somewhat more durable than relying on the implicit
initialization the way the 'opt' tool does for registered passes.

llvm-svn: 271650
2016-06-03 10:13:31 +00:00
Chandler Carruth
79352a662a Use the standard INITIALIZE_PASS macro rather than hand rolling a (not
entirely correct) version of its contents.

llvm-svn: 271649
2016-06-03 10:13:29 +00:00
Krzysztof Parzyszek
7187f0db2b [Hexagon] Expand COPY pseudo-instruction
Handle it locally instead of having the target-independent pass deal
with it. The generic pass does not preserve implicit uses, which may
be necessary.

llvm-svn: 271520
2016-06-02 14:33:08 +00:00
Krzysztof Parzyszek
ab57ca3845 [RDF] Ignore implicit defs when resetting <kill> flags
llvm-svn: 271519
2016-06-02 14:30:09 +00:00
Krzysztof Parzyszek
4090309289 [Hexagon] Disable expanding MUX instructions that define a subregister
The code in HexagonExpandCondsets.cpp does not handle those cases at the
moment.

llvm-svn: 271281
2016-05-31 14:27:10 +00:00
Krzysztof Parzyszek
5a1924e7ea [Hexagon] Add option to enable subregister liveness tracking
llvm-svn: 271088
2016-05-28 02:02:51 +00:00
Krzysztof Parzyszek
421d04a22a [Hexagon] Separate C8 and USR to avoid unwanted subregister composition
Composing subreg_loreg with subreg_oveflow leads to strange results with
lane masks for register classes with subreg_loreg. In particular, dead
lane detection generates incorrect code.

llvm-svn: 271087
2016-05-28 01:51:16 +00:00
Krzysztof Parzyszek
1c30a694b9 [Hexagon] Use standard macros to initialize HexagonExpandCondsets pass
llvm-svn: 271045
2016-05-27 21:15:34 +00:00
Krzysztof Parzyszek
cde5da3f4a [Hexagon] Do not create passes in the constructor of HexagonPassConfig
When running mir tests, a pass created in that constructor would not be
freed, leading to memory leaks.

llvm-svn: 271043
2016-05-27 20:48:39 +00:00
Benjamin Kramer
63c3e24c6a Avoid some copies by using const references.
clang-tidy's performance-unnecessary-copy-initialization with some manual
fixes. No functional changes intended.

llvm-svn: 270988
2016-05-27 12:30:51 +00:00
Benjamin Kramer
284d6ac8f3 Apply clang-tidy's misc-static-assert where it makes sense.
Also fold conditions into assert(0) where it makes sense. No functional
change intended.

llvm-svn: 270982
2016-05-27 11:36:04 +00:00
Benjamin Kramer
e944e2f178 [hexagon] Move BlockRanges and RDF stuff into the llvm namespace.
No functional change intended.

llvm-svn: 270980
2016-05-27 10:06:40 +00:00
Krzysztof Parzyszek
871650f3b5 [Hexagon] Enable the post-RA scheduler
The aggressive anti-dependency breaker can rename the restored callee-
saved registers. To prevent this, mark these registers are live on all
paths to the return/tail-call instructions, and add implicit use operands
for them to these instructions.

llvm-svn: 270898
2016-05-26 19:44:28 +00:00
Krzysztof Parzyszek
30a7bb4136 [Hexagon] Select the aggressive anti-dependency breaker
llvm-svn: 270857
2016-05-26 15:38:50 +00:00
Krzysztof Parzyszek
3964c84399 [Hexagon] Move some debug-only variable declarations into DEBUG
llvm-svn: 270459
2016-05-23 17:31:30 +00:00
David Blaikie
16fe2be1c3 Fix -Wunused-variable in non-Asserts build
llvm-svn: 270118
2016-05-19 20:44:22 +00:00
David Blaikie
5ded374dc4 Simplify conditional unreachable into an assertion
llvm-svn: 270111
2016-05-19 20:28:40 +00:00
Ron Lieberman
79c4da8069 Fix a covnersion from string to bool issue used in an assert
Problem Was exposed by -Wstring-conversion
    

llvm-svn: 270087
2016-05-19 18:05:56 +00:00
Rafael Espindola
22e87bbb08 Delete Reloc::Default.
Having an enum member named Default is quite confusing: Is it distinct
from the others?

This patch removes that member and instead uses Optional<Reloc> in
places where we have a user input that still hasn't been maped to the
default value, which is now clear has no be one of the remaining 3
options.

llvm-svn: 269988
2016-05-18 22:04:49 +00:00
Krzysztof Parzyszek
0275bfc11c [Hexagon] Recognize "q" and "v" in inline-asm as register constraints
llvm-svn: 269933
2016-05-18 14:34:51 +00:00
Krzysztof Parzyszek
0efdf6d032 [Hexagon] Make getCallerSavedRegs specific to a register class
llvm-svn: 269674
2016-05-16 18:02:28 +00:00
Krzysztof Parzyszek
6566530702 [Hexagon] Simplify HexagonInstrInfo::isPredicable
Remove all the checks for constant extenders from isPredicable. The users
of it should be the ones checking cost/profitability.

llvm-svn: 269664
2016-05-16 16:56:10 +00:00
Krzysztof Parzyszek
bcb9eb3047 [Hexagon] Remove dead nodes from SelectionDAG to avoid cycles
Recent changes to the instruction selection code exposed a problem where
a dead node was not removed on time. This node had both input and output
chains, which lead to an apparent cycle.

llvm-svn: 269458
2016-05-13 18:48:15 +00:00
Krzysztof Parzyszek
bbc158d4f4 [scan-build] fix dead store warnings emitted on LLVM Hexagon code base
Patch by Apelete Seketeli.

Differential Revision: http://reviews.llvm.org/D19900

llvm-svn: 269415
2016-05-13 13:13:59 +00:00
Krzysztof Parzyszek
16219f4217 [MIB] Create a helper function getRegState to extract all register flags
llvm-svn: 269414
2016-05-13 13:01:19 +00:00
Justin Bogner
9eb8000baa SDAG: Implement Select instead of SelectImpl in HexagonDAGToDAGISel
- Where we were returning a node before, call ReplaceNode instead.
- Where we had already replaced all uses and we returned a node, just
  remove the dead node instead.
- Where we would return null to fall back to another selector, rename
  the method to try* and return a bool for success.

Part of llvm.org/pr26808.

llvm-svn: 269358
2016-05-12 21:46:18 +00:00
Justin Bogner
44f3c13019 SDAG: Clean up a dangling node in HexagonISelDAGToDAG::SelectImpl
When we convert to the void Select interface, leaving unreferenced
nodes around won't be allowed anymore.

Part of llvm.org/pr26808.

llvm-svn: 269355
2016-05-12 21:24:23 +00:00
Krzysztof Parzyszek
f3aefcd439 [Hexagon] Expand VSelect pseudo instructions
llvm-svn: 269328
2016-05-12 19:16:02 +00:00
Krzysztof Parzyszek
f351ddf6e0 [Hexagon] Properly handle instruction selection of vsplat intrinsics
llvm-svn: 269312
2016-05-12 17:21:40 +00:00
Krzysztof Parzyszek
d9da7d70e4 [Hexagon] Add a debug option to disable all backend optimizations
llvm-svn: 269192
2016-05-11 15:01:30 +00:00
Krzysztof Parzyszek
72a4224270 [Hexagon] Use offsets relative to FP+8 in .cfi_offset instructions
When generating .cfi_offset instructions, make sure that the offset is
calculated with respect to the register used to define the CFA (which is
currently always FP+8).

llvm-svn: 269191
2016-05-11 14:53:07 +00:00
Justin Bogner
05ddcaf8c0 SDAG: Avoid relying on the return value of SelectCode in Hexagon. NFC
This is a bit of a spot fix for now. I'll try to fix this up more
comprehensively soon.

This is part of the work to have Select return void instead of an
SDNode *, which is in turn part of llvm.org/pr26808.

llvm-svn: 269112
2016-05-10 20:31:53 +00:00
Matthias Braun
556abb392a CodeGen: Move TargetPassConfig from Passes.h to an own header; NFC
Many files include Passes.h but only a fraction needs to know about the
TargetPassConfig class. Move it into an own header. Also rename
Passes.cpp to TargetPassConfig.cpp while we are at it.

llvm-svn: 269011
2016-05-10 03:21:59 +00:00
Krzysztof Parzyszek
72e4e48963 [Hexagon] Treat all conditional branches as predicted (not-taken by default)
llvm-svn: 268946
2016-05-09 18:22:07 +00:00
Krzysztof Parzyszek
37a28def86 [Hexagon] Be careful about anti-dependencies with a call in packetizer
In a case like
  J2_callr <ga:@foo>, %R0<imp-use>, ...
  R0<def> = ...
the anti-dependency on R0 cannot be ignored and the two instructions
cannot be packetized together, since if they were, the assignment to
R0 would take place before the call.

llvm-svn: 268776
2016-05-06 19:13:38 +00:00
Justin Bogner
9448d374ee SDAG: Rename Select->SelectImpl and repurpose Select as returning void
This is a step towards removing the rampant undefined behaviour in
SelectionDAG, which is a part of llvm.org/PR26808.

We rename SelectionDAGISel::Select to SelectImpl and update targets to
match, and then change Select to return void and consolidate the
sketchy behaviour we're trying to get away from there.

Next, we'll update backends to implement `void Select(...)` instead of
SelectImpl and eventually drop the base Select implementation.

llvm-svn: 268693
2016-05-05 23:19:08 +00:00
Krzysztof Parzyszek
c935f59419 [scan-build] fix warnings emitted on LLVM Hexagon code base
Patch by Apelete Seketeli.

Differential Revision: http://reviews.llvm.org/D19968

llvm-svn: 268691
2016-05-05 22:00:44 +00:00
Krzysztof Parzyszek
03ea811655 [Hexagon] Fix the offset ranges for vector memory instructions
llvm-svn: 268690
2016-05-05 21:58:02 +00:00
NAKAMURA Takumi
25dc6f95a1 Touch Hexagon/CMakeLists.txt to regenerate build files, since r268641 complains of missing HexagonAlias.td on ninja.
FIXME: TableGen.cmake globs *.td(s) with wildcards for deps. It is not good.
llvm-svn: 268666
2016-05-05 19:28:01 +00:00
Krzysztof Parzyszek
4622dac468 [Hexagon] Add aliases for vector loads/stores with no explicit offset
The mem(r0) instructions are treated as mem(r0+#0).

llvm-svn: 268661
2016-05-05 18:38:35 +00:00
Krzysztof Parzyszek
7943b9ccdb [Hexagon] Merge HexagonAlias.td into HexagonInstrAlias.td, NFC
llvm-svn: 268641
2016-05-05 16:19:36 +00:00
Krzysztof Parzyszek
275ca43ee3 [Hexagon] Handle operand type differences for A2_tfrpi
The instruction A2_tfrpi has a 64-bit operand, while the corresponding
intrinsic takes a 32-bit value. The actual value has only 8 significant
bits, so the difference is only in the type used to represent it.
In order to map the intrinsic to the instruction, the operand needs to
be extended to the correct type.

llvm-svn: 268635
2016-05-05 15:29:47 +00:00
Krzysztof Parzyszek
dc88db3465 Fix NDEBUG build: variables used only in debug code causing compile error
llvm-svn: 268057
2016-04-29 16:14:00 +00:00
Krzysztof Parzyszek
d4659dc8ea [Hexagon] Optimize addressing modes for load/store
Patch by Jyotsna Verma.

llvm-svn: 268051
2016-04-29 15:49:13 +00:00
Filipe Cabecinhas
c8ae081a57 Unify XDEBUG and EXPENSIVE_CHECKS (into the latter), and add an option to the cmake build to enable them.
Summary:
Historically, we had a switch in the Makefiles for turning on "expensive
checks". This has never been ported to the cmake build, but the
(dead-ish) code is still around.

This will also make it easier to turn it on in buildbots.

Reviewers: chandlerc

Subscribers: jyknight, mzolotukhin, RKSimon, gberry, llvm-commits

Differential Revision: http://reviews.llvm.org/D19723

llvm-svn: 268050
2016-04-29 15:22:48 +00:00
Krzysztof Parzyszek
1f77b82ca5 [RDF] Recognize tail calls in graph creation
llvm-svn: 267939
2016-04-28 20:40:08 +00:00
Krzysztof Parzyszek
89f6a784c5 [RDF] Improve handling of inline-asm
- Keep implicit defs from inline-asm instructions.
- Treat register references from inline-asm as fixed.

llvm-svn: 267936
2016-04-28 20:33:33 +00:00