Sylvestre Ledru
95a9414392
Fix a problem in the target detection for Debian GNU/HURD
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llvm-svn: 154117
2012-04-05 19:34:15 +00:00
Sylvestre Ledru
832fe6ca9e
Fix a problem in the target detection for Debian GNU/kFreeBSD
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llvm-svn: 154114
2012-04-05 18:53:09 +00:00
Owen Anderson
b21312019c
Treat f16 the same as f80/f128 for the purposes of generating constants during instruction selection.
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llvm-svn: 154113
2012-04-05 18:50:32 +00:00
Silviu Baranga
f376e00699
Added support for unpredictable ADC/SBC instructions on ARM, and also fixed some corner cases involving the PC register as an operand for these instructions.
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llvm-svn: 154101
2012-04-05 16:19:29 +00:00
Silviu Baranga
1c2668f700
Added support for handling unpredictable arithmetic instructions on ARM.
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llvm-svn: 154100
2012-04-05 16:13:15 +00:00
Hongbin Zheng
4da3f9fa46
BBVectorize: Add the const modifier to the VectorizeConfig because we won't
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modify it.
llvm-svn: 154098
2012-04-05 16:07:49 +00:00
Hongbin Zheng
7a4e40f87f
Introduce the VectorizeConfig class, with which we can control the behavior
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of the BBVectorizePass without using command line option. As pointed out
by Hal, we can ask the TargetLoweringInfo for the architecture specific
VectorizeConfig to perform vectorizing with architecture specific
information.
llvm-svn: 154096
2012-04-05 15:46:55 +00:00
James Molloy
3604b95957
An oversight when applying the patches for r150956 and r150957 to a vanilla tree meant I forgot to svn add these testcases.
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Noticed while investigating PR12274!
llvm-svn: 154090
2012-04-05 10:01:12 +00:00
Hongbin Zheng
8d380b332d
Add the function "vectorizeBasicBlock" which allow users vectorize a
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BasicBlock in other passes, e.g. we can call vectorizeBasicBlock in the
loop unroll pass right after the loop is unrolled.
llvm-svn: 154089
2012-04-05 08:05:16 +00:00
Jim Grosbach
5d11d38750
ARM assembly aliases for two-operand V[R]SHR instructions.
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rdar://11189467
llvm-svn: 154087
2012-04-05 07:23:53 +00:00
Argyrios Kyrtzidis
f5736f87f2
In MemoryBuffer::getOpenFile() make sure that the buffer is null-terminated if
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the caller requested a null-terminated one.
When mapping the file there could be a racing issue that resulted in the file being larger
than the FileSize passed by the caller. We already have an assertion
for this in MemoryBuffer::init() but have a runtime guarantee that
the buffer will be null-terminated, so do a copy that adds a null-terminator.
Protects against crash of rdar://11161822.
llvm-svn: 154082
2012-04-05 04:23:56 +00:00
Jim Grosbach
64f4e8d5b3
ARM assembly parsing for 'msr' plain 'cpsr' operand.
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Plain 'cpsr' is an alias for 'cpsr_fc'.
rdar://11153753
llvm-svn: 154080
2012-04-05 03:17:53 +00:00
Jakob Stoklund Olesen
e1ae4f161c
Pass the right sign to TLI->isLegalICmpImmediate.
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LSR can fold three addressing modes into its ICmpZero node:
ICmpZero BaseReg + Offset => ICmp BaseReg, -Offset
ICmpZero -1*ScaleReg + Offset => ICmp ScaleReg, Offset
ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg
The first two cases are only used if TLI->isLegalICmpImmediate() likes
the offset.
Make sure the right Offset sign is passed to this method in the second
case. The ARM version is not symmetric.
<rdar://problem/11184260>
llvm-svn: 154079
2012-04-05 03:10:56 +00:00
Bob Wilson
fcde5a3ac5
Do not include multiple -arch options in CPPFLAGS.
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llvm-svn: 154070
2012-04-05 00:35:55 +00:00
Michael J. Spencer
15541ee757
Fix -Wnon-virtual-dtor warnings.
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llvm-svn: 154063
2012-04-04 22:34:55 +00:00
Akira Hatanaka
e5ea70212f
Reapply 154038 without the failing test.
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llvm-svn: 154062
2012-04-04 22:16:36 +00:00
Owen Anderson
f6f930a990
Revert r154038. It was causing make check failures.
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llvm-svn: 154054
2012-04-04 21:18:58 +00:00
Pete Cooper
4f727ef169
REG_SEQUENCE expansion to COPY instructions wasn't taking account of sub register indices on the source registers. No simple test case
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llvm-svn: 154051
2012-04-04 21:03:25 +00:00
Benjamin Kramer
270e886395
Fix a C++11 UDL conflict.
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Still not fixed in the standard ;)
llvm-svn: 154044
2012-04-04 20:33:56 +00:00
Pete Cooper
8d002ed0bb
f16 FREM can now be legalized by promoting to f32
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llvm-svn: 154039
2012-04-04 19:36:31 +00:00
Akira Hatanaka
4df2267566
Fix LowerGlobalAddress to produce instructions with the correct relocation
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types for N32 ABI. Add new test case and update existing ones.
llvm-svn: 154038
2012-04-04 19:02:38 +00:00
Akira Hatanaka
f9e02ac6e1
Fix LowerJumpTable to produce instructions with the correct relocation
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types for N32 ABI. Test case will be updated after the patch that fixes
TargetLowering::getPICJumpTableRelocBase is checked in.
llvm-svn: 154036
2012-04-04 18:31:32 +00:00
Akira Hatanaka
c8028e2551
Fix LowerConstantPool to produce instructions with the correct relocation
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types for N32 ABI and update test case.
llvm-svn: 154034
2012-04-04 18:26:12 +00:00
Jakob Stoklund Olesen
0419ed395c
Implement ARMBaseInstrInfo::commuteInstruction() for MOVCCr.
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A MOVCCr instruction can be commuted by inverting the condition. This
can help reduce register pressure and remove unnecessary copies in some
cases.
<rdar://problem/11182914>
llvm-svn: 154033
2012-04-04 18:23:42 +00:00
Jakob Stoklund Olesen
f0c39f0a1e
Remove spurious debug output.
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llvm-svn: 154032
2012-04-04 18:23:38 +00:00
Akira Hatanaka
913d78a99c
Fix LowerBlockAddress to produce instructions with the correct relocation
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types for N32 ABI and update test case.
llvm-svn: 154031
2012-04-04 18:22:53 +00:00
Hongbin Zheng
2a8f0cf400
Add testcase for r154007, when a function has the optsize attribute,
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the loop should be unrolled according the value of OptSizeUnrollThreshold.
llvm-svn: 154014
2012-04-04 13:24:40 +00:00
Rafael Espindola
88a1aeb123
Always compute all the bits in ComputeMaskedBits.
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This allows us to keep passing reduced masks to SimplifyDemandedBits, but
know about all the bits if SimplifyDemandedBits fails. This allows instcombine
to simplify cases like the one in the included testcase.
llvm-svn: 154011
2012-04-04 12:51:34 +00:00
Hongbin Zheng
c50b4781ab
LoopUnrollPass: Use variable "Threshold" instead of "CurrentThreshold" when
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reducing unroll count, otherwise the reduced unroll count is not taking
the "OptimizeForSize" attribute into account.
llvm-svn: 154007
2012-04-04 11:44:08 +00:00
Benjamin Kramer
a323a34d00
Move yaml::Stream's dtor out of line so it can see Scanner's dtor.
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llvm-svn: 154004
2012-04-04 08:53:34 +00:00
Benjamin Kramer
3532e8b899
Implement DwarfLLVMRegPair::operator< without violating asymmetry.
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MSVC8 verifies this.
llvm-svn: 154002
2012-04-04 08:24:08 +00:00
Craig Topper
2a4fe8b344
Convert assert(false) followed by a return to llvm_unreachable
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llvm-svn: 153997
2012-04-04 04:55:46 +00:00
Craig Topper
98fc96208f
Remove default case from switch that was already covering all cases.
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llvm-svn: 153996
2012-04-04 04:42:42 +00:00
Pete Cooper
702973d27c
Removed useless switch for default case when switch was covering all the enum values
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llvm-svn: 153984
2012-04-04 00:53:04 +00:00
Bob Wilson
ba2b9f1272
Fix the install location for the Embedded makefile target.
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svn r145378 inadvertently changed the destination for the Embedded target
in the makefile. Add a "/Developer" suffix to DSTROOT to compensate.
llvm-svn: 153980
2012-04-03 23:44:39 +00:00
Michael J. Spencer
84f354e368
Sorry about that. MSVC seems to accept just about any random string you give it ;/
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llvm-svn: 153979
2012-04-03 23:36:44 +00:00
Bob Wilson
3e0c867151
Remove dead code for installing libLTO when building llvmCore.
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llvm-svn: 153978
2012-04-03 23:13:26 +00:00
Michael J. Spencer
2f9beb2374
Add YAML parser to Support.
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llvm-svn: 153977
2012-04-03 23:09:22 +00:00
Pete Cooper
4164f86b8a
Add VSELECT to LegalizeVectorTypes::ScalariseVectorResult. Previously it would crash if it encountered a 1 element VSELECT. Solution is slightly more complicated than just creating a SELET as we have to mask or sign extend the vector condition if it had different boolean contents from the scalar condition. Fixes <rdar://problem/11178095>
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llvm-svn: 153976
2012-04-03 22:57:55 +00:00
Pete Cooper
983fc686b4
Removed one last bad continue statement meant to be removed in r153914.
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llvm-svn: 153975
2012-04-03 22:18:49 +00:00
Bob Wilson
f68ed1883e
When building llvmCore, pass the SDKROOT and -arch setting to configure.
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So far all of configure tests have been run against the default SDK and
architecture, regardless of what is actually being built. We've gotten
lucky until now. <rdar://problem/11112479>
llvm-svn: 153972
2012-04-03 21:50:26 +00:00
Bob Wilson
1944a74c98
Remove a reference to the C backend.
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llvm-svn: 153971
2012-04-03 21:50:24 +00:00
Chad Rosier
e7870c71eb
Fix an issue in SimplifySetCC() specific to vector comparisons.
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When folding X == X we need to check getBooleanContents() to determine if the
result is a vector of ones or a vector of negative ones.
I tried creating a test case, but the problem seems to only be exposed on a
much older version of clang (around r144500).
rdar://10923049
llvm-svn: 153966
2012-04-03 20:11:24 +00:00
Anton Korobeynikov
64a47d779a
Set soname for FreeBSD as well.
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Patch by Bernard Cafarelli!
llvm-svn: 153965
2012-04-03 19:48:31 +00:00
Eric Christopher
53ef0cf4a5
Fix thinko check for number of operands to be the one that actually
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might have more than 19 operands. Add a testcase to make sure I
never screw that up again.
Part of rdar://11026482
llvm-svn: 153961
2012-04-03 17:55:42 +00:00
Lang Hames
4c05101031
Matrix simplification in PBQP may push infinite costs onto register options.
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The colorability heuristic should count these as denied registers.
No test case - this exposed a bug on an out-of-tree target.
llvm-svn: 153958
2012-04-03 16:27:16 +00:00
Dylan Noblesmith
8ab4926be7
ARMDisassembler: drop bogus dependency on ARMCodeGen
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And indirectly, a dependency on most of the core LLVM optimization
libraries.
llvm-svn: 153957
2012-04-03 15:48:14 +00:00
Dylan Noblesmith
2431e625b9
Object: drop bogus VMCore dependency
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llvm-svn: 153956
2012-04-03 15:48:10 +00:00
Bill Wendling
e3c2c36927
The speedup doesn't appear to have been from this, but was an anomaly of my testing machine.
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llvm-svn: 153951
2012-04-03 11:19:21 +00:00
Bill Wendling
3f12fbd290
Reserve space for the eventual filling of the vector. This gives a small speedup.
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llvm-svn: 153949
2012-04-03 10:50:09 +00:00