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Commit Graph

212386 Commits

Author SHA1 Message Date
Simon Pilgrim
6290499aa9 [X86] canonicalizeShuffleWithBinOps - add X86ISD::PSHUFB handling. 2021-03-07 12:56:35 +00:00
Simon Pilgrim
10e7fd344e [X86] canonicalizeShuffleWithBinOps - shuffle oneuse constants.
We can freely shuffle all ones/zeros constants but we can also freely shuffle other constants as long as they only have one use.
2021-03-07 11:17:03 +00:00
Tony
b0eb76b4ee [NFC][AMDGPU]DWARF Extensions For Heterogeneous Debugging generic type endianity
In "DWARF Extensions For Heterogeneous Debugging" document that the
DWARF generic type has a target architecture defined endianity.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D98126
2021-03-07 04:51:05 +00:00
Fangrui Song
dc406fffe4 [MC] Migrate some parseToken(AsmToken::EndOfStatement, ...) to parseEOL() 2021-03-06 19:25:22 -08:00
Fangrui Song
1846161749 [MC] Add parseEOL() overload and migrate some parseToken(AsmToken::EndOfStatement) to parseEOL()
For many directives, the following diagnostics

* `error: unexpected token`
* `error: unexpected token in '.abort' directive"`

are replaced with `error: expected newline`.

`unexpected token` may make the user think a different token is needed.
`expected newline` is clearer about the expected token.

For `in '...' directive`, the directive name is not useful because the next line
replicates the error line which includes the directive.
2021-03-06 17:45:23 -08:00
Fangrui Song
88672a94ce [MC] Parse end-of-line for .addrsig & .addrsig_sym 2021-03-06 16:26:27 -08:00
Fangrui Song
9b5534c085 [MC] Parse end-of-line for .cfi_* directives
Otherwise MCAsmStreamer will emit duplicate newlines.
2021-03-06 16:20:55 -08:00
Kazu Hirata
1b606d525d [TableGen] Use range-based for loops (NFC) 2021-03-06 15:52:55 -08:00
Kazu Hirata
e9253d2c3c [objdump] Use ListSeparator (NFC) 2021-03-06 15:52:54 -08:00
Fangrui Song
7517775e7d [MC] Support .symver *, *, remove
As a resolution to https://sourceware.org/bugzilla/show_bug.cgi?id=25295 , GNU as
from binutils 2.35 supports the optional third argument for the .symver directive.

'remove' for a non-default version is useful:
`.symver def_v1, def@v1, remove` => def_v1 is not retained in the symbol table.
Previously the user has to strip the original symbol or specify a `local:`
version node in a version script to localize the symbol.

`.symver def, def@@v1, remove` and `.symver def, def@@@v1, remove` are supported
as well, though they are identical to `.symver def, def@@@v1`.

local/hidden are not useful so this patch does not implement them.
2021-03-06 15:23:02 -08:00
Nikita Popov
2cc01b071e [GVN] Don't explicitly materialize undefs from dead blocks
When materializing an available load value, do not explicitly
materialize the undef values from dead blocks. Doing so will
will force creation of a phi with an undef operand, even if there
is a dominating definition. The phi will be folded away on
subsequent GVN iterations, but by then we may have already
poisoned MDA cache slots.

Simply don't register these values in the first place, and let
SSAUpdater do its thing.
2021-03-06 23:46:24 +01:00
Nikita Popov
b0de28ec91 [GVN] Add test for load GVN with dead block (NFC)
What this test illustrates is that GVN inserts an unnecessary
phi node initially, which prevents alias analysis from establishing
NoAlias, and MDA caches that result. We would be able to fully fold
this after another -gvn run with clean MDA.
2021-03-06 23:19:58 +01:00
Fangrui Song
c788c9781a [ModuleSummaryAnalysis] Avoid duplicate elements in Worklist. NFC 2021-03-06 14:19:22 -08:00
Fangrui Song
6f9b975128 [FunctionImport] Delete unneeded setLive. NFC
ValueInfo's in Worklist are guaranteed to be live.
2021-03-06 14:09:54 -08:00
Mauri Mustonen
feef90db23 [VPlan] Support to widen call intructions in VPlan native path
Add support to widen call instructions in VPlan native path by using a correct recipe when such instructions are encountered. This is already used by inner loop vectorizer.

Previously call instructions got handled by wrong recipes and resulted in unreachable instruction errors like this one: https://bugs.llvm.org/show_bug.cgi?id=48139.

Patch by Mauri Mustonen <mauri.mustonen@tuni.fi>

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D97278
2021-03-06 21:59:52 +00:00
Roman Lebedev
f8aefe5e24 [InstCombine] Don't canonicalize (gep i8* X, -(ptrtoint Y)) as (inttoptr (sub (ptrtoint X), (ptrtoint Y)))
It's just a wrong thing to do.

We introduce inttoptr where there were none, which results in
loosing all provenance information because we no longer have a GEP{i,},
and pessimize all future optimizations,
because we are basically not allowed to look past `inttoptr`.

(gep i8* X, -(ptrtoint Y))  *is* the canonical form.
So just drop this fold.

Noticed while reviewing D98120.
2021-03-06 23:00:25 +03:00
Roman Lebedev
441a484092 [NFC][InstCombine] Add plain GEP test for (gep i8* X, -(ptrtoint Y)) --> (inttoptr (sub (ptrtoint X), (ptrtoint Y))) fold 2021-03-06 23:00:25 +03:00
Fangrui Song
6f69fc9933 [rs4gc] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds 2021-03-06 11:42:27 -08:00
Roman Lebedev
eb30ce19c4 [NFCI] SCEVExpander: emit intrinsics for integral {u,s}{min,max} SCEV expressions
These intrinsics, not the icmp+select are the canonical form nowadays,
so we might as well directly emit them.

This should not cause any regressions, but if it does,
then then they would needed to be fixed regardless.

Note that this doesn't deal with `SCEVExpander::isHighCostExpansion()`,
but that is a pessimization, not a correctness issue.

Additionally, the non-intrinsic form has issues with undef,
see https://reviews.llvm.org/D88287#2587863
2021-03-06 21:52:46 +03:00
Sean Fertile
551e5c7de1 [PowePC][AIX] Handle variadic vector call operands.
Patch adds support for passing vector call operands to variadic
functions. Arguments which are fixed shadow GPRs and stack space even
when they are passed in vector registers, while arguments passed through
ellipses are passed in properly aligned GPRs if available and on the
stack once all GPR arguments registers are consumed.

Differential Revision: https://reviews.llvm.org/D97956
2021-03-06 13:49:55 -05:00
Ta-Wei Tu
87e3ae17fd [NPM] Add -enable-loopinterchange option to NPM
We have the `enable-loopinterchange` option in legacy pass manager but not in NPM.
Add `LoopInterchange` pass to the optimization pipeline (at the same position as before)
when `enable-loopinterchange` is turned on.

Reviewed By: aeubanks, fhahn

Differential Revision: https://reviews.llvm.org/D98116
2021-03-07 02:39:28 +08:00
William S. Moses
3600c78d3c [Attributor] Enable heap-to-stack of any size
Enable Attributor's heap-to-stack to lower unbounded allocations given a max size of -1

Differential Revision: https://reviews.llvm.org/D97873
2021-03-06 12:57:32 -05:00
Philip Reames
2c93a90304 [tests] Update an autogen test for format change 2021-03-06 09:49:27 -08:00
Philip Reames
83f044db4a [gvn] Handle simply phi equivalence cases
GVN basically doesn't handle phi nodes at all. This is for a reason - we can't value number their inputs since the predecessor blocks have probably not been visited yet.

However, it also creates a significant pass ordering problem. As it stands, instcombine and simplifycfg ends up implementing CSE of phi nodes. This means that for any series of CSE opportunities intermixed with phi nodes, we end up having to alternate instcombine/simplifycfg and gvn to make progress.

This patch handles the simplest case by simply preprocessing the phi instructions in a block, and CSEing them if they are syntactically identical. This turns out to be powerful enough to handle many cases in a single invocation of GVN since blocks which use the cse'd phi results are visited after the block containing the phi. If there's a CSE opportunity in one the phi predecessors required to recognize the phi CSE opportunity, that will require a second iteration on the function. (Still within a single run of gvn though.)

Compile time wise, this could go either way. On one hand, we're potentially causing GVN to iterate over the function more. On the other, we're cutting down on iterations between two passes and potentially shrinking the IR aggressively. So, a bit unclear what to expect.

Note that this does still rely on instcombine to canonicalize block order of the phis, but that's a one time transformation independent of the values incoming to the phi.

Differential Revision: https://reviews.llvm.org/D98080
2021-03-06 09:31:12 -08:00
Philip Reames
84c1d0a603 [rs4gc/tests] Remove use of internal debug flags
As a pragmatic tradeoff, the ease of updating the tests outweighs the slightly easier to understand test conditions.  Where revevant, debug output was converted to comments to help human understanding.
2021-03-06 09:20:02 -08:00
Philip Reames
4ba57ecf74 [rs4gc] autogen a bunch of tests for ease of update 2021-03-06 09:04:00 -08:00
Philip Reames
5b78c86a21 [rs4gc] track the original value in the state use for base pointer rewriting
I'd originally intended to build on this for another purpose and have decided not to, but at a minimum, the stronger asserts are useful.
2021-03-06 08:46:15 -08:00
Philip Reames
bddbaa0fa3 [rs4gc] minor code style improvement 2021-03-06 08:46:15 -08:00
Nikita Popov
fbb0e66968 [Loads] Restructure getAvailableLoadStore implementation (NFC)
Separate out some conditions with early exits, to make it easier to
support additional cases.
2021-03-06 16:58:11 +01:00
Nikita Popov
3182b065d2 [InstCombine] Add tests for non-trivial store to load forward (NFC)
Examples of things we mostly don't handle.
2021-03-06 16:58:11 +01:00
Alexey Lapshin
468d967ea8 [X86][VARARG] Avoid spilling xmm registers for va_start.
That review is extracted from D69372.
It fixes https://bugs.llvm.org/show_bug.cgi?id=42219 bug.

For the noimplicitfloat mode, the compiler mustn't generate
floating-point code if it was not asked directly to do so.
This rule does not work with variable function arguments currently.
Though compiler correctly guards block of code, which copies xmm vararg
parameters with a check for %al, it does not protect spills for xmm registers.
Thus, such spills are generated in non-protected areas and could break code,
which does not expect floating-point data. The problem happens in -O0
optimization mode. With this optimization level there is used
FastRegisterAllocator, which spills virtual registers at basic block boundaries.
Register Allocator does not protect spills with additional control-flow modifications.
Thus to resolve that problem, it is suggested to not copy incoming physical
registers into virtual registers. Instead, store incoming physical xmm registers
into the memory from scratch.

Differential Revision: https://reviews.llvm.org/D80163
2021-03-06 15:25:47 +03:00
Nikita Popov
fa0178256e [ConstantFold] Handle vectors in ConstantFoldLoadThroughBitcast()
There seems to be an impedance mismatch between what the type
system considers an aggregate (structs and arrays) and what
constants consider an aggregate (structs, arrays and vectors).

Rather than adjusting the type check, simply drop it entirely,
as getAggregateElement() is well-defined for non-aggregates: It
simply returns null in that case.
2021-03-06 12:17:56 +01:00
Nikita Popov
d3cd0c6c1e [GVN] Regenerate test checks (NFC) 2021-03-06 12:11:16 +01:00
Juneyoung Lee
5caecc36c3 [LangRef] dos2unix (NFC) 2021-03-06 18:44:40 +09:00
Nikita Popov
9f2cfa55ab [LVI] Simplify and generalize handling of clamp patterns
Instead of handling a number of special cases for selects, handle
this generally when inferring ranges from conditions. We already
infer ranges from `x + C pred C2` to `x`, so doing the same for
`x pred C2` to `x + C` is straightforward.
2021-03-06 10:42:41 +01:00
Nikita Popov
4eecbe8800 [CVP] Add additional tests for clamp patterns (NFC)
These are the same as the existing tests, but using different
predicates that are not handled by the current code.
2021-03-06 10:42:40 +01:00
Raul Tambre
8f820ce4a5 [runtimes] Fix crosscompiling after a7cad6680b4087eff8994f1f99ac40c661a6621f (D97451)
It moved the logic for CMake target arguments into llvm_ExternalProject_Add().
No handling was added for CMAKE_CROSSCOMPILING, which has a separate set of compiler_args.
This broke crosscompiling, as now the runtimes builds defaulted to the compiler's default.

I've also added passing of CMAKE_ASM_COMPILER, which was missing before although we were passing the triple for it.

Reviewed By: zero9178

Differential Revision: https://reviews.llvm.org/D97855
2021-03-06 11:35:14 +02:00
Nikita Popov
634e7e2d73 [LVI] Pass offset by reference (NFC)
Instead of by pointer. This allows us to use offsets that are not
materialized in the IR.
2021-03-06 10:24:44 +01:00
Nikita Popov
7fce4c6c26 [CVP] Fix tests for clamp patterns (NFC)
These tests didn't test the pattern they were supposed to, because
%a instead of %add was used in the select, which turned this into
a normal min/max).

Noticed this when commenting out the clamp handling code did not
result in any test failures...
2021-03-06 10:24:44 +01:00
Jay Foad
f22c8bd800 Revert "Revert "[AMDGPU] Restore the s_memtime instruction in gfx1030""
This reverts commit e58d68fcd06ddc7743e0419c0b364df3d44121b6.

This reinstates commit fc28f600e558c1344618bda149a068d6162b6f0b
with a fix to initialize HasShaderCyclesRegister. See
https://reviews.llvm.org/D97928.
2021-03-06 09:00:01 +00:00
Fangrui Song
f13eb14aac [MC][RISCV] Support .reloc *, BFD_RELOC_{NONE,32,64}, *
BFD_RELOC_NONE is useful for ld --gc-sections: it provides a generic way indicating a dependency between two sections.
2021-03-05 21:45:11 -08:00
Fangrui Song
6bc3220cd9 [MC][ARM] Support .reloc *, BFD_RELOC_{NONE,8,16,32}, *
BFD_RELOC_NONE is useful for ld --gc-sections: it provides a generic way indicating a dependency between two sections.
2021-03-05 21:39:16 -08:00
Fangrui Song
b781b17cdc [MC][test] Fix reloc-directive-elf-*.s 2021-03-05 21:37:29 -08:00
Fangrui Song
3abc3e0ea7 [MC][PowerPC] Support .reloc *, BFD_RELOC_{NONE,16,32,64}, *
BFD_RELOC_NONE is useful for ld --gc-sections: it provides a generic way indicating a dependency between two sections.
2021-03-05 21:31:45 -08:00
Fangrui Song
c0f3b9dd4e [MC][AArch64] Support .reloc *, BFD_RELOC_{NONE,16,32,64}, *
BFD_RELOC_NONE is useful for ld --gc-sections: it provides a generic way indicating a dependency between two sections.
2021-03-05 21:31:08 -08:00
Fangrui Song
d0c3033896 [MC][X86] Support .reloc *, BFD_RELOC_{NONE,8,16,32,64}, *
The names are unfortunate, but BFD_RELOC_NONE provides a generic way indicating
a dependency between two sections, which is useful for ld --gc-sections.
See https://sourceware.org/bugzilla/show_bug.cgi?id=27530
2021-03-05 21:31:05 -08:00
Mitch Phillips
073a491a84 Revert "[AMDGPU] Restore the s_memtime instruction in gfx1030"
Broke the ASan/MSan buildbots. See more comments in the original patch,
https://reviews.llvm.org/D97928.

Build failure at http://lab.llvm.org:8011/#/builders/5/builds/5327

This reverts commit fc28f600e558c1344618bda149a068d6162b6f0b.
2021-03-05 18:24:59 -08:00
Jessica Clarke
310b95be5f [benchmark] Replace references to M680x0 with M68k
The former was the old unusual name of the out-of-tree backend but it
was renamed to M68k during the code review process to conform with how
almost everything refers to the Motorola 68000 family of processors.
Thus, update the comments to avoid confusion when the backend lands.
2021-03-06 01:04:36 +00:00
Philip Reames
9572ae12ef [tests] precommit tests for D98082 2021-03-05 15:21:34 -08:00
Philip Reames
6567af9d6c [tests] precommit tests for phi handling in GVN 2021-03-05 14:24:21 -08:00